Dave Stevenson 87551ec650 drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5 ...

HVS5 has moved the interrupt enable bits around within the
DISPCTRL register, therefore the configuration has to be updated
to account for this.

Fixes: c54619b0bf ("drm/vc4: Add support for the BCM2711 HVS5")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-4-1f8e0770798b@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>

2023-01-09 15:21:30 +01:00

..

drm

drm/vc4: hvs: Correct interrupt masking bit assignment for HVS5

2023-01-09 15:21:30 +01:00

host1x

gpu: host1x: Avoid trying to use GART on Tegra20

2022-11-18 09:33:20 +01:00

ipu-v3

gpu: ipu-v3: common: Add of_node_put() for reference returned by of_graph_get_port_by_id()

2022-12-16 18:40:29 +01:00

trace

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vga

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Makefile

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