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Add devicetree bindings support for ade9000. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
96 lines
2.4 KiB
YAML
96 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2025 Analog Devices Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ade9000.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices ADE9000 High Performance, Polyphase Energy Metering
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maintainers:
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- Antoniu Miclaus <antoniu.miclaus@analog.com>
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description: |
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The ADE9000 is a highly accurate, fully integrated, multiphase energy and power
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quality monitoring device. Superior analog performance and a digital signal
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processing (DSP) core enable accurate energy monitoring over a wide dynamic
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range. An integrated high end reference ensures low drift over temperature
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with a combined drift of less than ±25 ppm/°C maximum for the entire channel
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including a programmable gain amplifier (PGA) and an analog-to-digital
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converter (ADC).
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https://www.analog.com/media/en/technical-documentation/data-sheets/ADE9000.pdf
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$ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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enum:
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- adi,ade9000
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reg:
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maxItems: 1
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spi-max-frequency:
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maximum: 20000000
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interrupts:
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maxItems: 3
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interrupt-names:
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items:
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enum: [irq0, irq1, dready]
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minItems: 1
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maxItems: 3
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reset-gpios:
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description:
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Must be the device tree identifier of the RESET pin. As the line is
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active low, it should be marked GPIO_ACTIVE_LOW.
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maxItems: 1
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vdd-supply: true
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vref-supply: true
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clocks:
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description: External clock source when not using crystal
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maxItems: 1
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"#clock-cells":
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description:
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ADE9000 can provide clock output via CLKOUT pin with external buffer.
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const: 0
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required:
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- compatible
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- reg
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- vdd-supply
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ade9000";
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reg = <0>;
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spi-max-frequency = <7000000>;
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#clock-cells = <0>;
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reset-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
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interrupts = <2 IRQ_TYPE_EDGE_FALLING>, <3 IRQ_TYPE_EDGE_FALLING>, <4 IRQ_TYPE_EDGE_FALLING>;
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interrupt-names = "irq0", "irq1", "dready";
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interrupt-parent = <&gpio>;
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clocks = <&ext_clock_24576khz>;
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vdd-supply = <&vdd_reg>;
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};
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};
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