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Use correct clocks properties for the AD7124 family of ADCs. These ADCs have an internal clock along with an optional external clock that can be connected to the CLK pin. This pin can be wired up 3 ways: 1. Not connected - the internal clock is used. 2. Connected to an external clock (input) - the external clock is used. 3. Connected to the CLK pin on another ADC (output) - the internal clock is used on one and the other is configured for an external clock. The new bindings describe these 3 cases by picking one of the following: 1. Omit both clocks and #clock-cells properties. 2. Include only the clocks property with a phandle to the external clock. 3. Include only the #clock-cells property on the ADC providing the output. The clock-names property is now deprecated and should not be used. The MCLK signal that it refers to is an internal counter in the ADC and therefore does not make sense as a devicetree property as it can't be connected to anything external to the ADC. Since there is only one possible external clock, the clock-names property is not needed anyway. Based on the implementation of the Linux driver, it looks like the "mclk" clock was basically being used as a control to select the power mode of the ADC, which is not something that should be done in the devicetree. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250828-iio-adc-ad7124-proper-clock-support-v3-1-0b317b4605e5@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
183 lines
4.4 KiB
YAML
183 lines
4.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Analog Devices Inc.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Analog Devices AD7124 ADC device driver
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maintainers:
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- Marcelo Schmitt <marcelo.schmitt@analog.com>
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- Nuno Sá <nuno.sa@analog.com>
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description: |
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Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
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found here:
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https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
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properties:
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compatible:
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enum:
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- adi,ad7124-4
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- adi,ad7124-8
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reg:
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description: SPI chip select number for the device
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maxItems: 1
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clocks:
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maxItems: 1
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description: Optional external clock connected to the CLK pin.
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clock-names:
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deprecated: true
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description:
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MCLK is an internal counter in the ADC. Do not use this property.
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items:
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- const: mclk
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'#clock-cells':
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description:
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The CLK pin can be used as an output. When that is the case, include
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this property.
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const: 0
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interrupts:
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description: IRQ line for the ADC
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maxItems: 1
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rdy-gpios:
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description:
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GPIO reading the R̅D̅Y̅ line. Having such a GPIO is technically optional but
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highly recommended because DOUT/R̅D̅Y̅ toggles during SPI transfers (in its
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DOUT aka MISO role) and so usually triggers a spurious interrupt. The
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distinction between such a spurious event and a real one can only be done
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by reading such a GPIO. (There is a register telling the same
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information, but accessing that one needs a SPI transfer which then
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triggers another interrupt event.)
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 0
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refin1-supply:
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description: refin1 supply can be used as reference for conversion.
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refin2-supply:
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description: refin2 supply can be used as reference for conversion.
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avdd-supply:
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description: avdd supply can be used as reference for conversion.
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required:
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- compatible
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- reg
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- interrupts
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# Can't have both clock input and output at the same time.
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not:
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required:
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- '#clock-cells'
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- clocks
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patternProperties:
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"^channel@([0-9]|1[0-5])$":
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$ref: adc.yaml
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type: object
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description: |
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Represents the external channels which are connected to the ADC.
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properties:
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reg:
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description: |
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The channel number. It can have up to 8 channels on ad7124-4
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and 16 channels on ad7124-8, numbered from 0 to 15.
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items:
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minimum: 0
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maximum: 15
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adi,reference-select:
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description: |
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Select the reference source to use when converting on
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the specific channel. Valid values are:
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0: REFIN1(+)/REFIN1(−).
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1: REFIN2(+)/REFIN2(−).
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3: AVDD
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If this field is left empty, internal reference is selected.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [0, 1, 3]
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diff-channels: true
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bipolar: true
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adi,buffered-positive:
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description: Enable buffered mode for positive input.
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type: boolean
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adi,buffered-negative:
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description: Enable buffered mode for negative input.
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type: boolean
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required:
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- reg
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- diff-channels
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additionalProperties: false
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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adc@0 {
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compatible = "adi,ad7124-4";
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reg = <0>;
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spi-max-frequency = <5000000>;
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interrupts = <25 2>;
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interrupt-parent = <&gpio>;
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rdy-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
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refin1-supply = <&adc_vref>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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diff-channels = <0 1>;
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adi,reference-select = <0>;
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adi,buffered-positive;
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};
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channel@1 {
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reg = <1>;
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bipolar;
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diff-channels = <2 3>;
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adi,reference-select = <0>;
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adi,buffered-positive;
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adi,buffered-negative;
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};
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channel@2 {
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reg = <2>;
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diff-channels = <4 5>;
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};
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channel@3 {
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reg = <3>;
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diff-channels = <6 7>;
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};
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};
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};
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