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Most implementations cache the combined result of two-stage translation, but some, like Andes cores, use split TLBs that store VS-stage and G-stage entries separately. On such systems, when a VCPU migrates to another CPU, an additional HFENCE.VVMA is required to avoid using stale VS-stage entries, which could otherwise cause guest faults. Introduce a static key to identify CPUs with split two-stage TLBs. When enabled, KVM issues an extra HFENCE.VVMA on VCPU migration to prevent stale VS-stage mappings. Signed-off-by: Hui Min Mina Chou <minachou@andestech.com> Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Reviewed-by: Radim Krčmář <rkrcmar@ventanamicro.com> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Link: https://lore.kernel.org/r/20251117084555.157642-1-minachou@andestech.com Signed-off-by: Anup Patel <anup@brainfault.org>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <linux/bitops.h>
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#include <linux/cpumask.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/kvm_host.h>
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#include <asm/csr.h>
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#include <asm/kvm_mmu.h>
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#include <asm/kvm_tlb.h>
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#include <asm/kvm_vmid.h>
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static unsigned long vmid_version = 1;
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static unsigned long vmid_next;
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static unsigned long vmid_bits __ro_after_init;
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static DEFINE_SPINLOCK(vmid_lock);
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void __init kvm_riscv_gstage_vmid_detect(void)
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{
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/* Figure-out number of VMID bits in HW */
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csr_write(CSR_HGATP, (kvm_riscv_gstage_mode << HGATP_MODE_SHIFT) | HGATP_VMID);
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vmid_bits = csr_read(CSR_HGATP);
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vmid_bits = (vmid_bits & HGATP_VMID) >> HGATP_VMID_SHIFT;
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vmid_bits = fls_long(vmid_bits);
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csr_write(CSR_HGATP, 0);
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/* We polluted local TLB so flush all guest TLB */
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kvm_riscv_local_hfence_gvma_all();
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/* We don't use VMID bits if they are not sufficient */
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if ((1UL << vmid_bits) < num_possible_cpus())
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vmid_bits = 0;
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}
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unsigned long kvm_riscv_gstage_vmid_bits(void)
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{
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return vmid_bits;
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}
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int kvm_riscv_gstage_vmid_init(struct kvm *kvm)
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{
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/* Mark the initial VMID and VMID version invalid */
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kvm->arch.vmid.vmid_version = 0;
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kvm->arch.vmid.vmid = 0;
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return 0;
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}
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bool kvm_riscv_gstage_vmid_ver_changed(struct kvm_vmid *vmid)
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{
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if (!vmid_bits)
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return false;
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return unlikely(READ_ONCE(vmid->vmid_version) !=
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READ_ONCE(vmid_version));
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}
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static void __local_hfence_gvma_all(void *info)
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{
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kvm_riscv_local_hfence_gvma_all();
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}
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void kvm_riscv_gstage_vmid_update(struct kvm_vcpu *vcpu)
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{
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unsigned long i;
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struct kvm_vcpu *v;
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struct kvm_vmid *vmid = &vcpu->kvm->arch.vmid;
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if (!kvm_riscv_gstage_vmid_ver_changed(vmid))
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return;
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spin_lock(&vmid_lock);
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/*
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* We need to re-check the vmid_version here to ensure that if
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* another vcpu already allocated a valid vmid for this vm.
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*/
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if (!kvm_riscv_gstage_vmid_ver_changed(vmid)) {
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spin_unlock(&vmid_lock);
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return;
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}
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/* First user of a new VMID version? */
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if (unlikely(vmid_next == 0)) {
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WRITE_ONCE(vmid_version, READ_ONCE(vmid_version) + 1);
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vmid_next = 1;
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/*
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* We ran out of VMIDs so we increment vmid_version and
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* start assigning VMIDs from 1.
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*
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* This also means existing VMIDs assignment to all Guest
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* instances is invalid and we have force VMID re-assignement
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* for all Guest instances. The Guest instances that were not
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* running will automatically pick-up new VMIDs because will
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* call kvm_riscv_gstage_vmid_update() whenever they enter
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* in-kernel run loop. For Guest instances that are already
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* running, we force VM exits on all host CPUs using IPI and
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* flush all Guest TLBs.
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*/
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on_each_cpu_mask(cpu_online_mask, __local_hfence_gvma_all,
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NULL, 1);
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}
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vmid->vmid = vmid_next;
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vmid_next++;
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vmid_next &= (1 << vmid_bits) - 1;
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WRITE_ONCE(vmid->vmid_version, READ_ONCE(vmid_version));
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spin_unlock(&vmid_lock);
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/* Request G-stage page table update for all VCPUs */
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kvm_for_each_vcpu(i, v, vcpu->kvm)
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kvm_make_request(KVM_REQ_UPDATE_HGATP, v);
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}
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