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Pull pci updates from Bjorn Helgaas:
"Resource management:
- Add pci_dev_for_each_resource() and pci_bus_for_each_resource()
iterators
PCIe native device hotplug:
- Fix AB-BA deadlock between reset_lock and device_lock
Power management:
- Wait longer for devices to become ready after resume (as we do for
reset) to accommodate Intel Titan Ridge xHCI devices
- Extend D3hot delay for NVIDIA HDA controllers to avoid
unrecoverable devices after a bus reset
Error handling:
- Clear PCIe Device Status after EDR since generic error recovery now
only clears it when AER is native
ASPM:
- Work around Chromebook firmware defect that clobbers Capability
list (including ASPM L1 PM Substates Cap) when returning from
D3cold to D0
Freescale i.MX6 PCIe controller driver:
- Install imprecise external abort handler only when DT indicates
PCIe support
Freescale Layerscape PCIe controller driver:
- Add ls1028a endpoint mode support
Qualcomm PCIe controller driver:
- Add SM8550 DT binding and driver support
- Add SDX55 DT binding and driver support
- Use bulk APIs for clocks of IP 1.0.0, 2.3.2, 2.3.3
- Use bulk APIs for reset of IP 2.1.0, 2.3.3, 2.4.0
- Add DT "mhi" register region for supported SoCs
- Expose link transition counts via debugfs to help debug low power
issues
- Support system suspend and resume; reduce interconnect bandwidth
and turn off clock and PHY if there are no active devices
- Enable async probe by default to reduce boot time
Miscellaneous:
- Sort controller Kconfig entries by vendor"
* tag 'pci-v6.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (56 commits)
PCI: xilinx: Drop obsolete dependency on COMPILE_TEST
PCI: mobiveil: Sort Kconfig entries by vendor
PCI: dwc: Sort Kconfig entries by vendor
PCI: Sort controller Kconfig entries by vendor
PCI: Use consistent controller Kconfig menu entry language
PCI: xilinx-nwl: Add 'Xilinx' to Kconfig prompt
PCI: hv: Add 'Microsoft' to Kconfig prompt
PCI: meson: Add 'Amlogic' to Kconfig prompt
PCI: Use of_property_present() for testing DT property presence
PCI/PM: Extend D3hot delay for NVIDIA HDA controllers
dt-bindings: PCI: qcom: Document msi-map and msi-map-mask properties
PCI: qcom: Add SM8550 PCIe support
dt-bindings: PCI: qcom: Add SM8550 compatible
PCI: qcom: Add support for SDX55 SoC
dt-bindings: PCI: qcom-ep: Fix the unit address used in example
dt-bindings: PCI: qcom: Add SDX55 SoC
dt-bindings: PCI: qcom: Update maintainers entry
PCI: qcom: Enable async probe by default
PCI: qcom: Add support for system suspend and resume
PCI/PM: Drop pci_bridge_wait_for_secondary_bus() timeout parameter
...
173 lines
3.9 KiB
C
173 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/pci.h>
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#include <linux/module.h>
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#include "pci.h"
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static void pci_free_resources(struct pci_dev *dev)
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{
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struct resource *res;
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pci_dev_for_each_resource(dev, res) {
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if (res->parent)
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release_resource(res);
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}
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}
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static void pci_stop_dev(struct pci_dev *dev)
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{
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pci_pme_active(dev, false);
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if (pci_dev_is_added(dev)) {
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device_release_driver(&dev->dev);
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pci_proc_detach_device(dev);
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pci_remove_sysfs_dev_files(dev);
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pci_dev_assign_added(dev, false);
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}
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}
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static void pci_destroy_dev(struct pci_dev *dev)
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{
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if (!dev->dev.kobj.parent)
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return;
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device_del(&dev->dev);
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down_write(&pci_bus_sem);
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list_del(&dev->bus_list);
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up_write(&pci_bus_sem);
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pcie_aspm_exit_link_state(dev);
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pci_bridge_d3_update(dev);
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pci_free_resources(dev);
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put_device(&dev->dev);
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}
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void pci_remove_bus(struct pci_bus *bus)
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{
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pci_proc_detach_bus(bus);
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down_write(&pci_bus_sem);
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list_del(&bus->node);
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pci_bus_release_busn_res(bus);
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up_write(&pci_bus_sem);
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pci_remove_legacy_files(bus);
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if (bus->ops->remove_bus)
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bus->ops->remove_bus(bus);
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pcibios_remove_bus(bus);
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device_unregister(&bus->dev);
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}
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EXPORT_SYMBOL(pci_remove_bus);
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static void pci_stop_bus_device(struct pci_dev *dev)
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{
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struct pci_bus *bus = dev->subordinate;
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struct pci_dev *child, *tmp;
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/*
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* Stopping an SR-IOV PF device removes all the associated VFs,
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* which will update the bus->devices list and confuse the
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* iterator. Therefore, iterate in reverse so we remove the VFs
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* first, then the PF.
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*/
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if (bus) {
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list_for_each_entry_safe_reverse(child, tmp,
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&bus->devices, bus_list)
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pci_stop_bus_device(child);
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}
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pci_stop_dev(dev);
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}
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static void pci_remove_bus_device(struct pci_dev *dev)
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{
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struct pci_bus *bus = dev->subordinate;
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struct pci_dev *child, *tmp;
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if (bus) {
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list_for_each_entry_safe(child, tmp,
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&bus->devices, bus_list)
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pci_remove_bus_device(child);
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pci_remove_bus(bus);
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dev->subordinate = NULL;
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}
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pci_destroy_dev(dev);
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}
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/**
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* pci_stop_and_remove_bus_device - remove a PCI device and any children
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* @dev: the device to remove
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*
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* Remove a PCI device from the device lists, informing the drivers
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* that the device has been removed. We also remove any subordinate
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* buses and children in a depth-first manner.
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*
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* For each device we remove, delete the device structure from the
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* device lists, remove the /proc entry, and notify userspace
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* (/sbin/hotplug).
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*/
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void pci_stop_and_remove_bus_device(struct pci_dev *dev)
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{
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pci_stop_bus_device(dev);
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pci_remove_bus_device(dev);
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}
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EXPORT_SYMBOL(pci_stop_and_remove_bus_device);
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void pci_stop_and_remove_bus_device_locked(struct pci_dev *dev)
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{
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pci_lock_rescan_remove();
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pci_stop_and_remove_bus_device(dev);
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pci_unlock_rescan_remove();
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}
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EXPORT_SYMBOL_GPL(pci_stop_and_remove_bus_device_locked);
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void pci_stop_root_bus(struct pci_bus *bus)
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{
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struct pci_dev *child, *tmp;
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struct pci_host_bridge *host_bridge;
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if (!pci_is_root_bus(bus))
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return;
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host_bridge = to_pci_host_bridge(bus->bridge);
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list_for_each_entry_safe_reverse(child, tmp,
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&bus->devices, bus_list)
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pci_stop_bus_device(child);
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/* stop the host bridge */
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device_release_driver(&host_bridge->dev);
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}
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EXPORT_SYMBOL_GPL(pci_stop_root_bus);
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void pci_remove_root_bus(struct pci_bus *bus)
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{
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struct pci_dev *child, *tmp;
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struct pci_host_bridge *host_bridge;
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if (!pci_is_root_bus(bus))
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return;
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host_bridge = to_pci_host_bridge(bus->bridge);
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list_for_each_entry_safe(child, tmp,
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&bus->devices, bus_list)
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pci_remove_bus_device(child);
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#ifdef CONFIG_PCI_DOMAINS_GENERIC
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/* Release domain_nr if it was dynamically allocated */
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if (host_bridge->domain_nr == PCI_DOMAIN_NR_NOT_SET)
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pci_bus_release_domain_nr(bus, host_bridge->dev.parent);
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#endif
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pci_remove_bus(bus);
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host_bridge->bus = NULL;
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/* remove the host bridge */
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device_del(&host_bridge->dev);
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}
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EXPORT_SYMBOL_GPL(pci_remove_root_bus);
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