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4092fc5f35
When the binding for the Cadence spi controller was written, a dedicated compatible was added for the zynq device. Later when zynqmp and versal-net, which also use this spi controller IP, were added they did not receive soc-specific compatibles. Add them now, with a fallback to the existing compatible for the r1p6 version of the IP so that there will be no functional change. Retain the r1p6 in the string, to match what was done for zynq. Disallow the cdns,spi-r1p6 compatible in isolation to "encourage" people to actually add soc-specific compatible strings in the future. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Michal Simek <michal.simek@amd.com> Link: https://patch.msgid.link/20251001-basics-grafting-a1a214ef65ac@spud Signed-off-by: Mark Brown <broonie@kernel.org>
92 lines
1.7 KiB
YAML
92 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/spi-cadence.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence SPI controller
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maintainers:
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- Michal Simek <michal.simek@amd.com>
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allOf:
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- $ref: spi-controller.yaml#
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properties:
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compatible:
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oneOf:
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- enum:
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- xlnx,zynq-spi-r1p6
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- items:
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- enum:
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- xlnx,zynqmp-spi-r1p6
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- xlnx,versal-net-spi-r1p6
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- const: cdns,spi-r1p6
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clock-names:
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items:
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- const: ref_clk
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- const: pclk
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clocks:
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maxItems: 2
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num-cs:
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description: |
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Number of chip selects used. If a decoder is used,
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this will be the number of chip selects after the
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decoder.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 4
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default: 4
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is-decoded-cs:
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description: |
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Flag to indicate whether decoder is used or not.
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 0, 1 ]
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default: 0
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power-domains:
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maxItems: 1
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label:
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description: Descriptive name of the SPI controller.
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: spi
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required:
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- compatible
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- reg
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- interrupts
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- clock-names
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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spi@e0007000 {
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compatible = "xlnx,zynq-spi-r1p6";
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clock-names = "ref_clk", "pclk";
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clocks = <&clkc 26>, <&clkc 35>;
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interrupt-parent = <&intc>;
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interrupts = <0 49 4>;
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num-cs = <4>;
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is-decoded-cs = <0>;
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reg = <0xe0007000 0x1000>;
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};
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...
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