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Drop 'inline' from all the *_mod_init_arch() functions so that the compiler will warn about any bugs where they are unused due to not being wired up properly. (There are no such bugs currently, so this just establishes a more robust convention for the future. Of course, these functions also tend to get inlined anyway, regardless of the keyword.) Link: https://lore.kernel.org/r/20250816020240.431545-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Calculate a CRC T10-DIF with vpmsum acceleration
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*
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* Copyright 2017, Daniel Axtens, IBM Corporation.
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* [based on crc32c-vpmsum_glue.c]
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*/
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#include <asm/simd.h>
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#include <asm/switch_to.h>
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#include <linux/cpufeature.h>
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#include <linux/jump_label.h>
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#include <linux/preempt.h>
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#include <linux/uaccess.h>
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#define VMX_ALIGN 16
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#define VMX_ALIGN_MASK (VMX_ALIGN-1)
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#define VECTOR_BREAKPOINT 64
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static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_vec_crypto);
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u32 __crct10dif_vpmsum(u32 crc, unsigned char const *p, size_t len);
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static inline u16 crc_t10dif_arch(u16 crci, const u8 *p, size_t len)
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{
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unsigned int prealign;
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unsigned int tail;
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u32 crc = crci;
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if (len < (VECTOR_BREAKPOINT + VMX_ALIGN) ||
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!static_branch_likely(&have_vec_crypto) ||
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unlikely(!may_use_simd()))
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return crc_t10dif_generic(crc, p, len);
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if ((unsigned long)p & VMX_ALIGN_MASK) {
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prealign = VMX_ALIGN - ((unsigned long)p & VMX_ALIGN_MASK);
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crc = crc_t10dif_generic(crc, p, prealign);
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len -= prealign;
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p += prealign;
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}
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if (len & ~VMX_ALIGN_MASK) {
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crc <<= 16;
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preempt_disable();
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pagefault_disable();
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enable_kernel_altivec();
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crc = __crct10dif_vpmsum(crc, p, len & ~VMX_ALIGN_MASK);
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disable_kernel_altivec();
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pagefault_enable();
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preempt_enable();
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crc >>= 16;
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}
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tail = len & VMX_ALIGN_MASK;
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if (tail) {
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p += len & ~VMX_ALIGN_MASK;
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crc = crc_t10dif_generic(crc, p, tail);
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}
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return crc & 0xffff;
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}
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#define crc_t10dif_mod_init_arch crc_t10dif_mod_init_arch
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static void crc_t10dif_mod_init_arch(void)
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{
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if (cpu_has_feature(CPU_FTR_ARCH_207S) &&
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(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_VEC_CRYPTO))
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static_branch_enable(&have_vec_crypto);
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}
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