ARM: dts: aspeed: Minor whitespace cleanup

The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250819131743.86905-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
This commit is contained in:
Krzysztof Kozlowski
2025-08-19 15:17:44 +02:00
committed by Andrew Jeffery
parent 20ae14024a
commit fe42f567c3
12 changed files with 27 additions and 27 deletions

View File

@@ -243,7 +243,7 @@
compatible = "ti,tmp75";
reg = <0x49>;
};
temperature-sensor@4a{
temperature-sensor@4a {
compatible = "ti,tmp75";
reg = <0x4a>;
};

View File

@@ -526,11 +526,11 @@
tach-ch = /bits/ 8 <0x03>;
};
};
fanctl0: fan-controller@21{
fanctl0: fan-controller@21 {
compatible = "maxim,max31790";
reg = <0x21>;
};
fanctl1: fan-controller@27{
fanctl1: fan-controller@27 {
compatible = "maxim,max31790";
reg = <0x27>;
};

View File

@@ -183,7 +183,7 @@
&i2c0 {
status = "okay";
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -257,7 +257,7 @@
&i2c2 {
status = "okay";
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;

View File

@@ -312,7 +312,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -435,7 +435,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -558,7 +558,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -681,7 +681,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -804,7 +804,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;
@@ -926,7 +926,7 @@
reg = <0x50>;
};
pwm@5e{
pwm@5e {
compatible = "max31790";
reg = <0x5e>;
#address-cells = <1>;

View File

@@ -233,7 +233,7 @@
"FM_NIC_PPS_IN_S0_R","FM_NIC_PPS_IN_S1_R";
};
fan-controller@21{
fan-controller@21 {
compatible = "maxim,max31790";
reg = <0x21>;
};

View File

@@ -1186,19 +1186,19 @@
ti,mode = /bits/ 8 <1>;
};
pwm@20{
pwm@20 {
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@2f{
pwm@2f {
compatible = "maxim,max31790";
reg = <0x2f>;
};
@@ -1234,19 +1234,19 @@
ti,mode = /bits/ 8 <1>;
};
pwm@20{
pwm@20 {
compatible = "maxim,max31790";
reg = <0x20>;
};
gpio@22{
gpio@22 {
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
};
pwm@2f{
pwm@2f {
compatible = "maxim,max31790";
reg = <0x2f>;
};

View File

@@ -263,7 +263,7 @@
reg = <0x51>;
};
tca_pres1: tca9554@20{
tca_pres1: tca9554@20 {
compatible = "ti,tca9554";
reg = <0x20>;
#address-cells = <1>;

View File

@@ -3778,10 +3778,10 @@
pinctrl-0 = <&U65200_pins>;
pinctrl-names = "default";
U65200_pins: cfg-pins {
pins = "gp60", "gp61", "gp62",
"gp63", "gp64", "gp65", "gp66",
"gp67", "gp70", "gp71", "gp72",
"gp73", "gp74", "gp75", "gp76", "gp77";
pins = "gp60", "gp61", "gp62", "gp63", "gp64",
"gp65", "gp66", "gp67", "gp70", "gp71",
"gp72", "gp73", "gp74", "gp75", "gp76",
"gp77";
function = "gpio";
input-enable;
bias-pull-up;

View File

@@ -151,7 +151,7 @@
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&adc{
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default

View File

@@ -282,7 +282,7 @@
};
&sgpiom0 {
status="okay";
status = "okay";
ngpios = <128>;
gpio-line-names =
"","",

View File

@@ -64,7 +64,7 @@
linux,code = <ASPEED_GPIO(F, 7)>;
};
event-pcie-e2b-present{
event-pcie-e2b-present {
label = "pcie-e2b-present";
gpios = <&gpio ASPEED_GPIO(E, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(E, 7)>;

View File

@@ -30,7 +30,7 @@
reusable;
};
ramoops@9eff0000{
ramoops@9eff0000 {
compatible = "ramoops";
reg = <0x9eff0000 0x10000>;
record-size = <0x2000>;