mirror of
https://github.com/torvalds/linux.git
synced 2025-12-07 11:56:58 +00:00
Merge tag 'linux-watchdog-6.19-rc1' of git://www.linux-watchdog.org/linux-watchdog
Pull watchdog updates from Wim Van Sebroeck:
- Add watchdog support for:
- Renesas WWDT
- AST2700 platform
- MediaTek MT8189 SoC
- Loongson-2k0300 watchdog
- Qualcomm Kaanapali watchdog
- RK3506 compatible
- Airoha AN7583 SoC
- DT Schema conversions:
- lantiq,wdt
- TI OMAP
- marvell,orion-wdt
- Several other fixes and improvements
* tag 'linux-watchdog-6.19-rc1' of git://www.linux-watchdog.org/linux-watchdog: (30 commits)
watchdog: starfive: Fix resource leak in probe error path
dt-bindings: watchdog: airoha: Add support for Airoha AN7583 SoC
dt-bindings: watchdog: lantiq,wdt: convert bindings to dtschema
dt-bindings: watchdog: Add RK3506 compatible
dt-bindings: watchdog: Document Qualcomm Kaanapali watchdog
watchdog: wdat_wdt: Fix ACPI table leak in probe function
watchdog: loongson1: Add Loongson-2k0300 watchdog support
dt-bindings: watchdog: loongson,ls1x-wdt: Add ls2k0300-wdt compatible
watchdog: loongson1: Drop CONFIG_OF
watchdog: loongson1: Simplify ls1x_wdt_probe code
watchdog: loongson1: Add missing MODULE_PARM_DESC
watchdog/diag288: Fix module comment typos
dt-bindings: watchdog: Support MediaTek MT8189 wdt
dt-bindings: watchdog: mediatek,mtk-wdt: Add compatible for MT8189 SoC
dt-bindings: mfd: rohm,bd96801-pmic: Correct timeout-sec length and reference watchdog schema
dt-bindings: watchdog: Allow node names named 'pmic'
dt-bindings: watchdog: Restrict timeout-sec to one number
watchdog: renesas_wwdt: add driver
dt-bindings: watchdog: Add Renesas WWDT
dt-bindings: watchdog: Convert marvell,orion-wdt to DT schema
...
This commit is contained in:
Linus Torvalds
@@ -57,8 +57,7 @@ properties:
|
||||
- prstb
|
||||
- intb-only
|
||||
|
||||
timeout-sec:
|
||||
maxItems: 2
|
||||
timeout-sec: true
|
||||
|
||||
regulators:
|
||||
$ref: /schemas/regulator/rohm,bd96801-regulator.yaml
|
||||
@@ -72,7 +71,10 @@ required:
|
||||
- interrupt-names
|
||||
- regulators
|
||||
|
||||
additionalProperties: false
|
||||
allOf:
|
||||
- $ref: /schemas/watchdog/watchdog.yaml
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
@@ -14,7 +14,11 @@ allOf:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: airoha,en7581-wdt
|
||||
oneOf:
|
||||
- items:
|
||||
- const: airoha,an7583-wdt
|
||||
- const: airoha,en7581-wdt
|
||||
- const: airoha,en7581-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -15,6 +15,7 @@ properties:
|
||||
- aspeed,ast2400-wdt
|
||||
- aspeed,ast2500-wdt
|
||||
- aspeed,ast2600-wdt
|
||||
- aspeed,ast2700-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
@@ -87,13 +88,15 @@ properties:
|
||||
aspeed,reset-mask:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 5
|
||||
description: >
|
||||
A bitmask indicating which peripherals will be reset if the watchdog
|
||||
timer expires. On AST2500 SoCs this should be a single word defined using
|
||||
the AST2500_WDT_RESET_* macros; on AST2600 SoCs this should be a two-word
|
||||
array with the first word defined using the AST2600_WDT_RESET1_* macros,
|
||||
and the second word defined using the AST2600_WDT_RESET2_* macros.
|
||||
and the second word defined using the AST2600_WDT_RESET2_* macros; on
|
||||
AST2700 SoCs, this should be five-word array from AST2700_WDT_RESET1_*
|
||||
macros to AST2700_WDT_RESET5_* macros.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
@@ -114,6 +117,7 @@ allOf:
|
||||
enum:
|
||||
- aspeed,ast2500-wdt
|
||||
- aspeed,ast2600-wdt
|
||||
- aspeed,ast2700-wdt
|
||||
- if:
|
||||
required:
|
||||
- aspeed,ext-active-high
|
||||
|
||||
57
Documentation/devicetree/bindings/watchdog/lantiq,wdt.yaml
Normal file
57
Documentation/devicetree/bindings/watchdog/lantiq,wdt.yaml
Normal file
@@ -0,0 +1,57 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/lantiq,wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Lantiq WTD watchdog
|
||||
|
||||
maintainers:
|
||||
- Hauke Mehrtens <hauke@hauke-m.de>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- lantiq,falcon-wdt
|
||||
- lantiq,wdt
|
||||
- lantiq,xrx100-wdt
|
||||
- items:
|
||||
- enum:
|
||||
- lantiq,xrx200-wdt
|
||||
- const: lantiq,xrx100-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
lantiq,rcu:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: Phandle to the RCU syscon node
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- lantiq,xrx100-wdt
|
||||
- lantiq,falcon-wdt
|
||||
then:
|
||||
required:
|
||||
- lantiq,rcu
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
watchdog@803f0 {
|
||||
compatible = "lantiq,xrx200-wdt", "lantiq,xrx100-wdt";
|
||||
reg = <0x803f0 0x10>;
|
||||
|
||||
lantiq,rcu = <&rcu0>;
|
||||
};
|
||||
@@ -1,24 +0,0 @@
|
||||
Lantiq WTD watchdog binding
|
||||
============================
|
||||
|
||||
This describes the binding of the Lantiq watchdog driver.
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
Required properties:
|
||||
- compatible : Should be one of
|
||||
"lantiq,wdt"
|
||||
"lantiq,xrx100-wdt"
|
||||
"lantiq,xrx200-wdt", "lantiq,xrx100-wdt"
|
||||
"lantiq,falcon-wdt"
|
||||
- reg : Address of the watchdog block
|
||||
- lantiq,rcu : A phandle to the RCU syscon (required for
|
||||
"lantiq,falcon-wdt" and "lantiq,xrx100-wdt")
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
Example for the watchdog on the xRX200 SoCs:
|
||||
watchdog@803f0 {
|
||||
compatible = "lantiq,xrx200-wdt", "lantiq,xrx100-wdt";
|
||||
reg = <0x803f0 0x10>;
|
||||
|
||||
lantiq,rcu = <&rcu0>;
|
||||
};
|
||||
@@ -4,7 +4,7 @@
|
||||
$id: http://devicetree.org/schemas/watchdog/loongson,ls1x-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Loongson-1 Watchdog Timer
|
||||
title: Loongson Watchdog Timer
|
||||
|
||||
maintainers:
|
||||
- Keguang Zhang <keguang.zhang@gmail.com>
|
||||
@@ -17,6 +17,7 @@ properties:
|
||||
enum:
|
||||
- loongson,ls1b-wdt
|
||||
- loongson,ls1c-wdt
|
||||
- loongson,ls2k0300-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
@@ -1,45 +0,0 @@
|
||||
* Marvell Orion Watchdog Time
|
||||
|
||||
Required Properties:
|
||||
|
||||
- Compatibility : "marvell,orion-wdt"
|
||||
"marvell,armada-370-wdt"
|
||||
"marvell,armada-xp-wdt"
|
||||
"marvell,armada-375-wdt"
|
||||
"marvell,armada-380-wdt"
|
||||
|
||||
- reg : Should contain two entries: first one with the
|
||||
timer control address, second one with the
|
||||
rstout enable address.
|
||||
|
||||
For "marvell,armada-375-wdt" and "marvell,armada-380-wdt":
|
||||
|
||||
- reg : A third entry is mandatory and should contain the
|
||||
shared mask/unmask RSTOUT address.
|
||||
|
||||
Clocks required for compatibles = "marvell,orion-wdt",
|
||||
"marvell,armada-370-wdt":
|
||||
- clocks : Must contain a single entry describing the clock input
|
||||
|
||||
Clocks required for compatibles = "marvell,armada-xp-wdt"
|
||||
"marvell,armada-375-wdt"
|
||||
"marvell,armada-380-wdt":
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
- clock-names : Must include the following entries:
|
||||
"nbclk" (L2/coherency fabric clock),
|
||||
"fixed" (Reference 25 MHz fixed-clock).
|
||||
|
||||
Optional properties:
|
||||
|
||||
- interrupts : Contains the IRQ for watchdog expiration
|
||||
- timeout-sec : Contains the watchdog timeout in seconds
|
||||
|
||||
Example:
|
||||
|
||||
wdt@20300 {
|
||||
compatible = "marvell,orion-wdt";
|
||||
reg = <0x20300 0x28>, <0x20108 0x4>;
|
||||
interrupts = <3>;
|
||||
timeout-sec = <10>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
@@ -0,0 +1,100 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/marvell,orion-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Orion Watchdog Timer
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,orion-wdt
|
||||
- marvell,armada-370-wdt
|
||||
- marvell,armada-xp-wdt
|
||||
- marvell,armada-375-wdt
|
||||
- marvell,armada-380-wdt
|
||||
|
||||
reg:
|
||||
minItems: 2
|
||||
items:
|
||||
- description: Timer control register address
|
||||
- description: RSTOUT enable register address
|
||||
- description: Shared mask/unmask RSTOUT register address
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: L2/coherency fabric clock input
|
||||
- description: Reference 25 MHz fixed-clock supply
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: nbclk
|
||||
- const: fixed
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: timeout
|
||||
- description: pre-timeout
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- marvell,armada-375-wdt
|
||||
- marvell,armada-380-wdt
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 3
|
||||
else:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- marvell,armada-xp-wdt
|
||||
- marvell,armada-375-wdt
|
||||
- marvell,armada-380-wdt
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
interrupts:
|
||||
minItems: 2
|
||||
|
||||
required:
|
||||
- clock-names
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
watchdog@20300 {
|
||||
compatible = "marvell,orion-wdt";
|
||||
reg = <0x20300 0x28>, <0x20108 0x4>;
|
||||
interrupts = <3>;
|
||||
timeout-sec = <10>;
|
||||
clocks = <&gate_clk 7>;
|
||||
};
|
||||
@@ -41,6 +41,8 @@ properties:
|
||||
- mediatek,mt7623-wdt
|
||||
- mediatek,mt7629-wdt
|
||||
- mediatek,mt8173-wdt
|
||||
- mediatek,mt8188-wdt
|
||||
- mediatek,mt8189-wdt
|
||||
- mediatek,mt8365-wdt
|
||||
- mediatek,mt8516-wdt
|
||||
- const: mediatek,mt6589-wdt
|
||||
|
||||
@@ -1,15 +0,0 @@
|
||||
TI Watchdog Timer (WDT) Controller for OMAP
|
||||
|
||||
Required properties:
|
||||
- compatible : "ti,omap3-wdt" for OMAP3 or "ti,omap4-wdt" for OMAP4
|
||||
- ti,hwmods : Name of the hwmod associated to the WDT
|
||||
|
||||
Optional properties:
|
||||
- timeout-sec : default watchdog timeout in seconds
|
||||
|
||||
Examples:
|
||||
|
||||
wdt2: wdt@4a314000 {
|
||||
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
@@ -22,6 +22,7 @@ properties:
|
||||
- qcom,apss-wdt-ipq5332
|
||||
- qcom,apss-wdt-ipq5424
|
||||
- qcom,apss-wdt-ipq9574
|
||||
- qcom,apss-wdt-kaanapali
|
||||
- qcom,apss-wdt-msm8226
|
||||
- qcom,apss-wdt-msm8974
|
||||
- qcom,apss-wdt-msm8994
|
||||
|
||||
@@ -0,0 +1,99 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/renesas,r9a09g057-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/V2H(P) Watchdog Timer (WDT) Controller
|
||||
|
||||
maintainers:
|
||||
- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a09g047-wdt # RZ/G3E
|
||||
- renesas,r9a09g056-wdt # RZ/V2N
|
||||
- const: renesas,r9a09g057-wdt # RZ/V2H(P)
|
||||
|
||||
- items:
|
||||
- const: renesas,r9a09g087-wdt # RZ/N2H
|
||||
- const: renesas,r9a09g077-wdt # RZ/T2H
|
||||
|
||||
- enum:
|
||||
- renesas,r9a09g057-wdt # RZ/V2H(P)
|
||||
- renesas,r9a09g077-wdt # RZ/T2H
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Register access clock
|
||||
- description: Main clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: pclk
|
||||
- const: oscclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
timeout-sec: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a09g057-wdt
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
reg:
|
||||
minItems: 2
|
||||
resets: false
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
|
||||
|
||||
watchdog@11c00400 {
|
||||
compatible = "renesas,r9a09g057-wdt";
|
||||
reg = <0x11c00400 0x400>;
|
||||
clocks = <&cpg CPG_MOD 0x4b>, <&cpg CPG_MOD 0x4c>;
|
||||
clock-names = "pclk", "oscclk";
|
||||
resets = <&cpg 0x75>;
|
||||
power-domains = <&cpg>;
|
||||
};
|
||||
@@ -0,0 +1,114 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/renesas,rcar-gen3-wwdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas Window Watchdog Timer (WWDT) Controller
|
||||
|
||||
maintainers:
|
||||
- Wolfram Sang <wsa+renesas@sang-engineering.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r8a77970-wwdt # R-Car V3M
|
||||
- renesas,r8a77980-wwdt # R-Car V3H
|
||||
- const: renesas,rcar-gen3-wwdt
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r8a779a0-wwdt # R-Car V3U
|
||||
- renesas,r8a779f0-wwdt # R-Car S4
|
||||
- renesas,r8a779g0-wwdt # R-Car V4H
|
||||
- renesas,r8a779h0-wwdt # R-Car V4M
|
||||
- const: renesas,rcar-gen4-wwdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: Pretimeout, 75% of overflow reached
|
||||
- description: Error occurred
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: pretimeout
|
||||
- const: error
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Counting clock
|
||||
- description: Bus clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: cnt
|
||||
- const: bus
|
||||
|
||||
resets:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
reset-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: cnt
|
||||
- const: bus
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- interrupt-names
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
- power-domains
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r8a779a0-wwdt
|
||||
- renesas,r8a779f0-wwdt
|
||||
then:
|
||||
properties:
|
||||
resets:
|
||||
minItems: 2
|
||||
reset-names:
|
||||
minItems: 2
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
|
||||
#include <dt-bindings/power/r8a779g0-sysc.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
watchdog@ffc90000 {
|
||||
compatible = "renesas,r8a779g0-wwdt",
|
||||
"renesas,rcar-gen4-wwdt";
|
||||
reg = <0xffc90000 0x10>;
|
||||
interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "pretimeout", "error";
|
||||
clocks = <&cpg CPG_CORE R8A779G0_CLK_R>,
|
||||
<&cpg CPG_CORE R8A779G0_CLK_SASYNCRT>;
|
||||
clock-names = "cnt", "bus";
|
||||
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 1200>;
|
||||
reset-names = "cnt";
|
||||
};
|
||||
@@ -0,0 +1,51 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/renesas,rza-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/A Watchdog Timer (WDT) Controller
|
||||
|
||||
maintainers:
|
||||
- Wolfram Sang <wsa+renesas@sang-engineering.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r7s72100-wdt # RZ/A1
|
||||
- renesas,r7s9210-wdt # RZ/A2
|
||||
- const: renesas,rza-wdt # RZ/A
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
timeout-sec: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r7s72100-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
watchdog@fcfe0000 {
|
||||
compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
|
||||
reg = <0xfcfe0000 0x6>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&p0_clk>;
|
||||
};
|
||||
@@ -0,0 +1,111 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/renesas,rzg2l-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/G2L Watchdog Timer (WDT) Controller
|
||||
|
||||
maintainers:
|
||||
- Biju Das <biju.das.jz@bp.renesas.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five
|
||||
- renesas,r9a07g044-wdt # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-wdt # RZ/V2L
|
||||
- renesas,r9a08g045-wdt # RZ/G3S
|
||||
- const: renesas,rzg2l-wdt
|
||||
|
||||
- items:
|
||||
- const: renesas,r9a09g011-wdt # RZ/V2M
|
||||
- const: renesas,rzv2m-wdt # RZ/V2M
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Timeout
|
||||
- description: Parity error
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: wdt
|
||||
- const: perrout
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Register access clock
|
||||
- description: Main clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pclk
|
||||
- const: oscclk
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
timeout-sec: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- power-domains
|
||||
- resets
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,rzg2l-wdt
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 2
|
||||
interrupt-names:
|
||||
minItems: 2
|
||||
required:
|
||||
- interrupt-names
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
interrupt-names:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r9a07g044-cpg.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
watchdog@12800800 {
|
||||
compatible = "renesas,r9a07g044-wdt",
|
||||
"renesas,rzg2l-wdt";
|
||||
reg = <0x12800800 0x400>;
|
||||
clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G044_WDT0_CLK>;
|
||||
clock-names = "pclk", "oscclk";
|
||||
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "wdt", "perrout";
|
||||
resets = <&cpg R9A07G044_WDT0_PRESETN>;
|
||||
power-domains = <&cpg>;
|
||||
};
|
||||
@@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/renesas,rzn1-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/N1 Watchdog Timer (WDT) Controller
|
||||
|
||||
maintainers:
|
||||
- Wolfram Sang <wsa+renesas@sang-engineering.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- const: renesas,r9a06g032-wdt # RZ/N1D
|
||||
- const: renesas,rzn1-wdt # RZ/N1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
timeout-sec: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
watchdog@40008000 {
|
||||
compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
|
||||
reg = <0x40008000 0x1000>;
|
||||
interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
|
||||
};
|
||||
@@ -13,30 +13,6 @@ maintainers:
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r7s72100-wdt # RZ/A1
|
||||
- renesas,r7s9210-wdt # RZ/A2
|
||||
- const: renesas,rza-wdt # RZ/A
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a06g032-wdt # RZ/N1D
|
||||
- const: renesas,rzn1-wdt # RZ/N1
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a07g043-wdt # RZ/G2UL and RZ/Five
|
||||
- renesas,r9a07g044-wdt # RZ/G2{L,LC}
|
||||
- renesas,r9a07g054-wdt # RZ/V2L
|
||||
- renesas,r9a08g045-wdt # RZ/G3S
|
||||
- const: renesas,rzg2l-wdt
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a09g011-wdt # RZ/V2M
|
||||
- const: renesas,rzv2m-wdt # RZ/V2M
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r8a7742-wdt # RZ/G1H
|
||||
@@ -75,47 +51,14 @@ properties:
|
||||
- renesas,r8a779h0-wdt # R-Car V4M
|
||||
- const: renesas,rcar-gen4-wdt # R-Car Gen4
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- renesas,r9a09g047-wdt # RZ/G3E
|
||||
- renesas,r9a09g056-wdt # RZ/V2N
|
||||
- const: renesas,r9a09g057-wdt # RZ/V2H(P)
|
||||
|
||||
- enum:
|
||||
- renesas,r9a09g057-wdt # RZ/V2H(P)
|
||||
- renesas,r9a09g077-wdt # RZ/T2H
|
||||
|
||||
- items:
|
||||
- const: renesas,r9a09g087-wdt # RZ/N2H
|
||||
- const: renesas,r9a09g077-wdt # RZ/T2H
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Timeout
|
||||
- description: Parity error
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: wdt
|
||||
- const: perrout
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Register access clock
|
||||
- description: Main clock
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: pclk
|
||||
- const: oscclk
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
@@ -129,6 +72,8 @@ required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- interrupts
|
||||
- power-domains
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
@@ -138,90 +83,11 @@ allOf:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a09g077-wdt
|
||||
- renesas,rza-wdt
|
||||
- renesas,rzn1-wdt
|
||||
const: renesas,r8a77980-wdt
|
||||
then:
|
||||
required:
|
||||
- power-domains
|
||||
- resets
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a09g057-wdt
|
||||
- renesas,rzg2l-wdt
|
||||
- renesas,rzv2m-wdt
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 2
|
||||
clock-names:
|
||||
minItems: 2
|
||||
required:
|
||||
- clock-names
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,rzg2l-wdt
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
minItems: 2
|
||||
interrupt-names:
|
||||
minItems: 2
|
||||
required:
|
||||
- interrupt-names
|
||||
else:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- renesas,r9a09g057-wdt
|
||||
- renesas,r9a09g077-wdt
|
||||
then:
|
||||
properties:
|
||||
interrupts: false
|
||||
interrupt-names: false
|
||||
else:
|
||||
required:
|
||||
- interrupts
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: renesas,r9a09g077-wdt
|
||||
then:
|
||||
properties:
|
||||
resets: false
|
||||
clock-names:
|
||||
maxItems: 1
|
||||
reg:
|
||||
minItems: 2
|
||||
required:
|
||||
- clock-names
|
||||
- power-domains
|
||||
else:
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
|
||||
@@ -28,6 +28,7 @@ properties:
|
||||
- rockchip,rk3328-wdt
|
||||
- rockchip,rk3368-wdt
|
||||
- rockchip,rk3399-wdt
|
||||
- rockchip,rk3506-wdt
|
||||
- rockchip,rk3562-wdt
|
||||
- rockchip,rk3568-wdt
|
||||
- rockchip,rk3576-wdt
|
||||
|
||||
51
Documentation/devicetree/bindings/watchdog/ti,omap2-wdt.yaml
Normal file
51
Documentation/devicetree/bindings/watchdog/ti,omap2-wdt.yaml
Normal file
@@ -0,0 +1,51 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/watchdog/ti,omap2-wdt.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI OMAP Watchdog Timer Controller
|
||||
|
||||
maintainers:
|
||||
- Aaro Koskinen <aaro.koskinen@iki.fi>
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- ti,omap2-wdt
|
||||
- ti,omap3-wdt
|
||||
- items:
|
||||
- enum:
|
||||
- ti,am4372-wdt
|
||||
- ti,omap4-wdt
|
||||
- ti,omap5-wdt
|
||||
- const: ti,omap3-wdt
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
ti,hwmods:
|
||||
description: Name of the hardware module associated with the watchdog.
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
deprecated: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
watchdog@48314000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
reg = <0x48314000 0x80>;
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
@@ -21,9 +21,10 @@ select:
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^(timer|watchdog)(@.*|-([0-9]|[1-9][0-9]+))?$"
|
||||
pattern: "^(pmic|timer|watchdog)(@.*|-([0-9]|[1-9][0-9]+))?$"
|
||||
|
||||
timeout-sec:
|
||||
maxItems: 1
|
||||
description:
|
||||
Contains the watchdog timeout in seconds.
|
||||
|
||||
|
||||
@@ -969,6 +969,14 @@ config RENESAS_WDT
|
||||
This driver adds watchdog support for the integrated watchdogs in the
|
||||
Renesas R-Car and other SH-Mobile SoCs (usually named RWDT or SWDT).
|
||||
|
||||
config RENESAS_WWDT
|
||||
tristate "Renesas Window WWDT Watchdog"
|
||||
depends on ARCH_RENESAS || COMPILE_TEST
|
||||
select WATCHDOG_CORE
|
||||
help
|
||||
This driver adds watchdog support for a window timer found in some
|
||||
Renesas R-Car Gen3 and later SoCs.
|
||||
|
||||
config RENESAS_RZAWDT
|
||||
tristate "Renesas RZ/A WDT Watchdog"
|
||||
depends on ARCH_RENESAS || COMPILE_TEST
|
||||
@@ -1976,10 +1984,10 @@ config LANTIQ_WDT
|
||||
|
||||
config LOONGSON1_WDT
|
||||
tristate "Loongson1 SoC hardware watchdog"
|
||||
depends on MACH_LOONGSON32 || COMPILE_TEST
|
||||
depends on MACH_LOONGSON32 || MACH_LOONGSON64 || COMPILE_TEST
|
||||
select WATCHDOG_CORE
|
||||
help
|
||||
Hardware driver for the Loongson1 SoC Watchdog Timer.
|
||||
Hardware driver for the Loongson family Watchdog Timer.
|
||||
|
||||
config RALINK_WDT
|
||||
tristate "Ralink SoC watchdog"
|
||||
|
||||
@@ -85,6 +85,7 @@ obj-$(CONFIG_DIGICOLOR_WATCHDOG) += digicolor_wdt.o
|
||||
obj-$(CONFIG_LPC18XX_WATCHDOG) += lpc18xx_wdt.o
|
||||
obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
|
||||
obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
|
||||
obj-$(CONFIG_RENESAS_WWDT) += renesas_wwdt.o
|
||||
obj-$(CONFIG_RENESAS_RZAWDT) += rza_wdt.o
|
||||
obj-$(CONFIG_RENESAS_RZN1WDT) += rzn1_wdt.o
|
||||
obj-$(CONFIG_RENESAS_RZG2LWDT) += rzg2l_wdt.o
|
||||
|
||||
@@ -35,6 +35,7 @@ struct aspeed_wdt_config {
|
||||
u32 irq_shift;
|
||||
u32 irq_mask;
|
||||
struct aspeed_wdt_scu scu;
|
||||
u32 num_reset_masks;
|
||||
};
|
||||
|
||||
struct aspeed_wdt {
|
||||
@@ -66,6 +67,7 @@ static const struct aspeed_wdt_config ast2500_config = {
|
||||
.wdt_reset_mask = 0x1,
|
||||
.wdt_reset_mask_shift = 2,
|
||||
},
|
||||
.num_reset_masks = 1,
|
||||
};
|
||||
|
||||
static const struct aspeed_wdt_config ast2600_config = {
|
||||
@@ -78,12 +80,27 @@ static const struct aspeed_wdt_config ast2600_config = {
|
||||
.wdt_reset_mask = 0xf,
|
||||
.wdt_reset_mask_shift = 16,
|
||||
},
|
||||
.num_reset_masks = 2,
|
||||
};
|
||||
|
||||
static const struct aspeed_wdt_config ast2700_config = {
|
||||
.ext_pulse_width_mask = 0xfffff,
|
||||
.irq_shift = 0,
|
||||
.irq_mask = GENMASK(31, 10),
|
||||
.scu = {
|
||||
.compatible = "aspeed,ast2700-scu0",
|
||||
.reset_status_reg = 0x70,
|
||||
.wdt_reset_mask = 0xf,
|
||||
.wdt_reset_mask_shift = 0,
|
||||
},
|
||||
.num_reset_masks = 5,
|
||||
};
|
||||
|
||||
static const struct of_device_id aspeed_wdt_of_table[] = {
|
||||
{ .compatible = "aspeed,ast2400-wdt", .data = &ast2400_config },
|
||||
{ .compatible = "aspeed,ast2500-wdt", .data = &ast2500_config },
|
||||
{ .compatible = "aspeed,ast2600-wdt", .data = &ast2600_config },
|
||||
{ .compatible = "aspeed,ast2700-wdt", .data = &ast2700_config },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
|
||||
@@ -479,11 +496,11 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
|
||||
set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
|
||||
}
|
||||
|
||||
if ((of_device_is_compatible(np, "aspeed,ast2500-wdt")) ||
|
||||
(of_device_is_compatible(np, "aspeed,ast2600-wdt"))) {
|
||||
u32 reset_mask[2];
|
||||
size_t nrstmask = of_device_is_compatible(np, "aspeed,ast2600-wdt") ? 2 : 1;
|
||||
if (!of_device_is_compatible(np, "aspeed,ast2400-wdt")) {
|
||||
u32 reset_mask[5];
|
||||
size_t nrstmask = wdt->cfg->num_reset_masks;
|
||||
u32 reg = readl(wdt->base + WDT_RESET_WIDTH);
|
||||
int i;
|
||||
|
||||
reg &= wdt->cfg->ext_pulse_width_mask;
|
||||
if (of_property_read_bool(np, "aspeed,ext-active-high"))
|
||||
@@ -503,9 +520,8 @@ static int aspeed_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask);
|
||||
if (!ret) {
|
||||
writel(reset_mask[0], wdt->base + WDT_RESET_MASK1);
|
||||
if (nrstmask > 1)
|
||||
writel(reset_mask[1], wdt->base + WDT_RESET_MASK2);
|
||||
for (i = 0; i < nrstmask; i++)
|
||||
writel(reset_mask[i], wdt->base + WDT_RESET_MASK1 + i * 4);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -6,10 +6,10 @@
|
||||
* to CP.
|
||||
*
|
||||
* The command can be altered using the module parameter "cmd". This is
|
||||
* not recommended because it's only supported on z/VM but not whith LPAR.
|
||||
* not recommended because it's only supported on z/VM but not with LPAR.
|
||||
*
|
||||
* On LPAR, the watchdog will always trigger a system restart. the module
|
||||
* paramter cmd is meaningless here.
|
||||
* On LPAR, the watchdog will always trigger a system restart. The module
|
||||
* parameter cmd is meaningless here.
|
||||
*
|
||||
*
|
||||
* Copyright IBM Corp. 2004, 2013
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
/*
|
||||
* Copyright (c) 2016 Yang Ling <gnaygnil@gmail.com>
|
||||
* Copyright (C) 2025 Binbin Zhou <zhoubinbin@loongson.cn>
|
||||
*/
|
||||
|
||||
#include <linux/clk.h>
|
||||
@@ -10,31 +11,52 @@
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/watchdog.h>
|
||||
|
||||
/* Loongson 1 Watchdog Register Definitions */
|
||||
/* Loongson Watchdog Register Definitions */
|
||||
#define WDT_EN 0x0
|
||||
#define WDT_TIMER 0x4
|
||||
#define WDT_SET 0x8
|
||||
|
||||
#define DEFAULT_HEARTBEAT 30
|
||||
|
||||
static bool nowayout = WATCHDOG_NOWAYOUT;
|
||||
module_param(nowayout, bool, 0444);
|
||||
module_param(nowayout, bool, 0);
|
||||
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
|
||||
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
|
||||
|
||||
static unsigned int heartbeat;
|
||||
module_param(heartbeat, uint, 0444);
|
||||
module_param(heartbeat, uint, 0);
|
||||
MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
|
||||
__MODULE_STRING(DEFAULT_HEARTBEAT) ")");
|
||||
|
||||
struct ls1x_wdt_pdata {
|
||||
u32 timer_offset;
|
||||
u32 set_offset;
|
||||
u32 wdt_en_bit;
|
||||
};
|
||||
|
||||
static const struct ls1x_wdt_pdata ls1b_wdt_pdata = {
|
||||
.timer_offset = 0x4,
|
||||
.set_offset = 0x8,
|
||||
.wdt_en_bit = BIT(0),
|
||||
};
|
||||
|
||||
static const struct ls1x_wdt_pdata ls2k0300_wdt_pdata = {
|
||||
.timer_offset = 0x8,
|
||||
.set_offset = 0x4,
|
||||
.wdt_en_bit = BIT(1),
|
||||
};
|
||||
|
||||
struct ls1x_wdt_drvdata {
|
||||
void __iomem *base;
|
||||
struct clk *clk;
|
||||
unsigned long clk_rate;
|
||||
struct watchdog_device wdt;
|
||||
const struct ls1x_wdt_pdata *pdata;
|
||||
};
|
||||
|
||||
static int ls1x_wdt_ping(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct ls1x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
|
||||
|
||||
writel(0x1, drvdata->base + WDT_SET);
|
||||
writel(0x1, drvdata->base + drvdata->pdata->set_offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -49,7 +71,7 @@ static int ls1x_wdt_set_timeout(struct watchdog_device *wdt_dev,
|
||||
wdt_dev->timeout = timeout;
|
||||
|
||||
counts = drvdata->clk_rate * min(timeout, max_hw_heartbeat);
|
||||
writel(counts, drvdata->base + WDT_TIMER);
|
||||
writel(counts, drvdata->base + drvdata->pdata->timer_offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -58,7 +80,7 @@ static int ls1x_wdt_start(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct ls1x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
|
||||
|
||||
writel(0x1, drvdata->base + WDT_EN);
|
||||
writel(drvdata->pdata->wdt_en_bit, drvdata->base + WDT_EN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -66,8 +88,10 @@ static int ls1x_wdt_start(struct watchdog_device *wdt_dev)
|
||||
static int ls1x_wdt_stop(struct watchdog_device *wdt_dev)
|
||||
{
|
||||
struct ls1x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
|
||||
u32 val = readl(drvdata->base + WDT_EN);
|
||||
|
||||
writel(0x0, drvdata->base + WDT_EN);
|
||||
val &= ~(drvdata->pdata->wdt_en_bit);
|
||||
writel(val, drvdata->base + WDT_EN);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -77,9 +101,9 @@ static int ls1x_wdt_restart(struct watchdog_device *wdt_dev,
|
||||
{
|
||||
struct ls1x_wdt_drvdata *drvdata = watchdog_get_drvdata(wdt_dev);
|
||||
|
||||
writel(0x1, drvdata->base + WDT_EN);
|
||||
writel(0x1, drvdata->base + WDT_TIMER);
|
||||
writel(0x1, drvdata->base + WDT_SET);
|
||||
writel(drvdata->pdata->wdt_en_bit, drvdata->base + WDT_EN);
|
||||
writel(0x1, drvdata->base + drvdata->pdata->timer_offset);
|
||||
writel(0x1, drvdata->base + drvdata->pdata->set_offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -104,11 +128,13 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
|
||||
struct ls1x_wdt_drvdata *drvdata;
|
||||
struct watchdog_device *ls1x_wdt;
|
||||
unsigned long clk_rate;
|
||||
int err;
|
||||
|
||||
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
|
||||
if (!drvdata)
|
||||
return -ENOMEM;
|
||||
platform_set_drvdata(pdev, drvdata);
|
||||
|
||||
drvdata->pdata = of_device_get_match_data(dev);
|
||||
|
||||
drvdata->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(drvdata->base))
|
||||
@@ -135,36 +161,51 @@ static int ls1x_wdt_probe(struct platform_device *pdev)
|
||||
watchdog_set_nowayout(ls1x_wdt, nowayout);
|
||||
watchdog_set_drvdata(ls1x_wdt, drvdata);
|
||||
|
||||
err = devm_watchdog_register_device(dev, &drvdata->wdt);
|
||||
if (err)
|
||||
return err;
|
||||
return devm_watchdog_register_device(dev, &drvdata->wdt);
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, drvdata);
|
||||
static int ls1x_wdt_resume(struct device *dev)
|
||||
{
|
||||
struct ls1x_wdt_drvdata *data = dev_get_drvdata(dev);
|
||||
|
||||
dev_info(dev, "Loongson1 Watchdog driver registered\n");
|
||||
if (watchdog_active(&data->wdt))
|
||||
ls1x_wdt_start(&data->wdt);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static int ls1x_wdt_suspend(struct device *dev)
|
||||
{
|
||||
struct ls1x_wdt_drvdata *data = dev_get_drvdata(dev);
|
||||
|
||||
if (watchdog_active(&data->wdt))
|
||||
ls1x_wdt_stop(&data->wdt);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static DEFINE_SIMPLE_DEV_PM_OPS(ls1x_wdt_pm_ops, ls1x_wdt_suspend, ls1x_wdt_resume);
|
||||
|
||||
static const struct of_device_id ls1x_wdt_dt_ids[] = {
|
||||
{ .compatible = "loongson,ls1b-wdt", },
|
||||
{ .compatible = "loongson,ls1c-wdt", },
|
||||
{ .compatible = "loongson,ls1b-wdt", .data = &ls1b_wdt_pdata },
|
||||
{ .compatible = "loongson,ls1c-wdt", .data = &ls1b_wdt_pdata },
|
||||
{ .compatible = "loongson,ls2k0300-wdt", .data = &ls2k0300_wdt_pdata },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, ls1x_wdt_dt_ids);
|
||||
#endif
|
||||
|
||||
static struct platform_driver ls1x_wdt_driver = {
|
||||
.probe = ls1x_wdt_probe,
|
||||
.driver = {
|
||||
.name = "ls1x-wdt",
|
||||
.of_match_table = of_match_ptr(ls1x_wdt_dt_ids),
|
||||
.of_match_table = ls1x_wdt_dt_ids,
|
||||
.pm = pm_ptr(&ls1x_wdt_pm_ops),
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(ls1x_wdt_driver);
|
||||
|
||||
MODULE_AUTHOR("Yang Ling <gnaygnil@gmail.com>");
|
||||
MODULE_DESCRIPTION("Loongson1 Watchdog Driver");
|
||||
MODULE_AUTHOR("Binbin Zhou <zhoubinbin@loongson.cn>");
|
||||
MODULE_DESCRIPTION("Loongson Watchdog Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
163
drivers/watchdog/renesas_wwdt.c
Normal file
163
drivers/watchdog/renesas_wwdt.c
Normal file
@@ -0,0 +1,163 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Driver for the Renesas Window Watchdog Timer (WWDT)
|
||||
*
|
||||
* The WWDT can only be setup once after boot. Because we cannot know if this
|
||||
* already happened in early boot stages, it is mandated that the firmware
|
||||
* configures the watchdog. Linux then adapts according to the given setup.
|
||||
* Note that this watchdog reports in the default configuration an overflow to
|
||||
* the Error Control Module which then decides further actions. Or the WWDT is
|
||||
* configured to generate an interrupt.
|
||||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/watchdog.h>
|
||||
|
||||
#define WDTA0WDTE 0x00
|
||||
#define WDTA0RUN BIT(7)
|
||||
#define WDTA0_KEY 0x2c
|
||||
|
||||
#define WDTA0MD 0x0c
|
||||
#define WDTA0OVF(x) FIELD_GET(GENMASK(6, 4), x)
|
||||
#define WDTA0WIE BIT(3)
|
||||
#define WDTA0ERM BIT(2)
|
||||
#define WDTA0WS(x) FIELD_GET(GENMASK(1, 0), x)
|
||||
|
||||
struct wwdt_priv {
|
||||
void __iomem *base;
|
||||
struct watchdog_device wdev;
|
||||
};
|
||||
|
||||
static int wwdt_start(struct watchdog_device *wdev)
|
||||
{
|
||||
struct wwdt_priv *priv = container_of(wdev, struct wwdt_priv, wdev);
|
||||
|
||||
writeb(WDTA0RUN | WDTA0_KEY, priv->base + WDTA0WDTE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct watchdog_info wwdt_ident = {
|
||||
.options = WDIOF_KEEPALIVEPING | WDIOF_ALARMONLY,
|
||||
.identity = "Renesas Window Watchdog",
|
||||
};
|
||||
|
||||
static const struct watchdog_ops wwdt_ops = {
|
||||
.owner = THIS_MODULE,
|
||||
.start = wwdt_start,
|
||||
};
|
||||
|
||||
static irqreturn_t wwdt_error_irq(int irq, void *dev_id)
|
||||
{
|
||||
struct device *dev = dev_id;
|
||||
|
||||
dev_warn(dev, "Watchdog timed out\n");
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static irqreturn_t wwdt_pretimeout_irq(int irq, void *dev_id)
|
||||
{
|
||||
struct watchdog_device *wdev = dev_id;
|
||||
|
||||
watchdog_notify_pretimeout(wdev);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int wwdt_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device *dev = &pdev->dev;
|
||||
struct wwdt_priv *priv;
|
||||
struct watchdog_device *wdev;
|
||||
struct clk *clk;
|
||||
unsigned long rate;
|
||||
unsigned int interval, window_size;
|
||||
int ret;
|
||||
u8 val;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->base = devm_platform_ioremap_resource(pdev, 0);
|
||||
if (IS_ERR(priv->base))
|
||||
return PTR_ERR(priv->base);
|
||||
|
||||
clk = devm_clk_get(dev, "cnt");
|
||||
if (IS_ERR(clk))
|
||||
return PTR_ERR(clk);
|
||||
|
||||
rate = clk_get_rate(clk);
|
||||
if (!rate)
|
||||
return -EINVAL;
|
||||
|
||||
wdev = &priv->wdev;
|
||||
|
||||
val = readb(priv->base + WDTA0WDTE);
|
||||
if (val & WDTA0RUN)
|
||||
set_bit(WDOG_HW_RUNNING, &wdev->status);
|
||||
|
||||
val = readb(priv->base + WDTA0MD);
|
||||
interval = 1 << (9 + WDTA0OVF(val));
|
||||
/* size of the closed(!) window per mille */
|
||||
window_size = 250 * (3 - WDTA0WS(val));
|
||||
|
||||
wdev->info = &wwdt_ident;
|
||||
wdev->ops = &wwdt_ops;
|
||||
wdev->parent = dev;
|
||||
wdev->min_hw_heartbeat_ms = window_size * interval / rate;
|
||||
wdev->max_hw_heartbeat_ms = 1000 * interval / rate;
|
||||
wdev->timeout = DIV_ROUND_UP(wdev->max_hw_heartbeat_ms, 1000);
|
||||
watchdog_set_nowayout(wdev, true);
|
||||
|
||||
if (!(val & WDTA0ERM)) {
|
||||
ret = platform_get_irq_byname(pdev, "error");
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, ret, NULL, wwdt_error_irq,
|
||||
IRQF_ONESHOT, NULL, dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (val & WDTA0WIE) {
|
||||
ret = platform_get_irq_byname(pdev, "pretimeout");
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = devm_request_threaded_irq(dev, ret, NULL, wwdt_pretimeout_irq,
|
||||
IRQF_ONESHOT, NULL, wdev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
devm_watchdog_register_device(dev, wdev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id renesas_wwdt_ids[] = {
|
||||
{ .compatible = "renesas,rcar-gen3-wwdt", },
|
||||
{ .compatible = "renesas,rcar-gen4-wwdt", },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, renesas_wwdt_ids);
|
||||
|
||||
static struct platform_driver renesas_wwdt_driver = {
|
||||
.driver = {
|
||||
.name = "renesas_wwdt",
|
||||
.of_match_table = renesas_wwdt_ids,
|
||||
},
|
||||
.probe = wwdt_probe,
|
||||
};
|
||||
module_platform_driver(renesas_wwdt_driver);
|
||||
|
||||
MODULE_DESCRIPTION("Renesas Window Watchdog (WWDT) Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
|
||||
@@ -500,12 +500,14 @@ static int starfive_wdt_probe(struct platform_device *pdev)
|
||||
if (pm_runtime_enabled(&pdev->dev)) {
|
||||
ret = pm_runtime_put_sync(&pdev->dev);
|
||||
if (ret)
|
||||
goto err_exit;
|
||||
goto err_unregister_wdt;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_unregister_wdt:
|
||||
watchdog_unregister_device(&wdt->wdd);
|
||||
err_exit:
|
||||
starfive_wdt_disable_clock(wdt);
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
@@ -165,6 +165,7 @@ static int wdt_probe(struct pci_dev *pdev,
|
||||
dev_err(&pdev->dev, "cannot enable PCI device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
wdt_res.name = "via_wdt";
|
||||
|
||||
/*
|
||||
* Allocate a MMIO region which contains watchdog control register
|
||||
|
||||
@@ -326,19 +326,27 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
return -ENODEV;
|
||||
|
||||
wdat = devm_kzalloc(dev, sizeof(*wdat), GFP_KERNEL);
|
||||
if (!wdat)
|
||||
return -ENOMEM;
|
||||
if (!wdat) {
|
||||
ret = -ENOMEM;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
regs = devm_kcalloc(dev, pdev->num_resources, sizeof(*regs),
|
||||
GFP_KERNEL);
|
||||
if (!regs)
|
||||
return -ENOMEM;
|
||||
if (!regs) {
|
||||
ret = -ENOMEM;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
/* WDAT specification wants to have >= 1ms period */
|
||||
if (tbl->timer_period < 1)
|
||||
return -EINVAL;
|
||||
if (tbl->min_count > tbl->max_count)
|
||||
return -EINVAL;
|
||||
if (tbl->timer_period < 1) {
|
||||
ret = -EINVAL;
|
||||
goto out_put_table;
|
||||
}
|
||||
if (tbl->min_count > tbl->max_count) {
|
||||
ret = -EINVAL;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
wdat->period = tbl->timer_period;
|
||||
wdat->wdd.min_timeout = DIV_ROUND_UP(wdat->period * tbl->min_count, 1000);
|
||||
@@ -355,15 +363,20 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
res = &pdev->resource[i];
|
||||
if (resource_type(res) == IORESOURCE_MEM) {
|
||||
reg = devm_ioremap_resource(dev, res);
|
||||
if (IS_ERR(reg))
|
||||
return PTR_ERR(reg);
|
||||
if (IS_ERR(reg)) {
|
||||
ret = PTR_ERR(reg);
|
||||
goto out_put_table;
|
||||
}
|
||||
} else if (resource_type(res) == IORESOURCE_IO) {
|
||||
reg = devm_ioport_map(dev, res->start, 1);
|
||||
if (!reg)
|
||||
return -ENOMEM;
|
||||
if (!reg) {
|
||||
ret = -ENOMEM;
|
||||
goto out_put_table;
|
||||
}
|
||||
} else {
|
||||
dev_err(dev, "Unsupported resource\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
regs[i] = reg;
|
||||
@@ -385,8 +398,10 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
instr = devm_kzalloc(dev, sizeof(*instr), GFP_KERNEL);
|
||||
if (!instr)
|
||||
return -ENOMEM;
|
||||
if (!instr) {
|
||||
ret = -ENOMEM;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(&instr->node);
|
||||
instr->entry = entries[i];
|
||||
@@ -417,7 +432,8 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
if (!instr->reg) {
|
||||
dev_err(dev, "I/O resource not found\n");
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
instructions = wdat->instructions[action];
|
||||
@@ -425,8 +441,10 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
instructions = devm_kzalloc(dev,
|
||||
sizeof(*instructions),
|
||||
GFP_KERNEL);
|
||||
if (!instructions)
|
||||
return -ENOMEM;
|
||||
if (!instructions) {
|
||||
ret = -ENOMEM;
|
||||
goto out_put_table;
|
||||
}
|
||||
|
||||
INIT_LIST_HEAD(instructions);
|
||||
wdat->instructions[action] = instructions;
|
||||
@@ -443,7 +461,7 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
ret = wdat_wdt_enable_reboot(wdat);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto out_put_table;
|
||||
|
||||
platform_set_drvdata(pdev, wdat);
|
||||
|
||||
@@ -460,12 +478,16 @@ static int wdat_wdt_probe(struct platform_device *pdev)
|
||||
|
||||
ret = wdat_wdt_set_timeout(&wdat->wdd, timeout);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto out_put_table;
|
||||
|
||||
watchdog_set_nowayout(&wdat->wdd, nowayout);
|
||||
watchdog_stop_on_reboot(&wdat->wdd);
|
||||
watchdog_stop_on_unregister(&wdat->wdd);
|
||||
return devm_watchdog_register_device(dev, &wdat->wdd);
|
||||
ret = devm_watchdog_register_device(dev, &wdat->wdd);
|
||||
|
||||
out_put_table:
|
||||
acpi_put_table((struct acpi_table_header *)tbl);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wdat_wdt_suspend_noirq(struct device *dev)
|
||||
|
||||
@@ -89,4 +89,142 @@
|
||||
|
||||
#define AST2600_WDT_RESET2_DEFAULT 0x03fffff1
|
||||
|
||||
#define AST2700_WDT_RESET1_CPU (1 << 0)
|
||||
#define AST2700_WDT_RESET1_DRAM (1 << 1)
|
||||
#define AST2700_WDT_RESET1_SLI0 (1 << 2)
|
||||
#define AST2700_WDT_RESET1_EHCI (1 << 3)
|
||||
#define AST2700_WDT_RESET1_HACE (1 << 4)
|
||||
#define AST2700_WDT_RESET1_SOC_MISC0 (1 << 5)
|
||||
#define AST2700_WDT_RESET1_VIDEO (1 << 6)
|
||||
#define AST2700_WDT_RESET1_2D_GRAPHIC (1 << 7)
|
||||
#define AST2700_WDT_RESET1_RAVS0 (1 << 8)
|
||||
#define AST2700_WDT_RESET1_RAVS1 (1 << 9)
|
||||
#define AST2700_WDT_RESET1_GPIO0 (1 << 10)
|
||||
#define AST2700_WDT_RESET1_SSP (1 << 11)
|
||||
#define AST2700_WDT_RESET1_TSP (1 << 12)
|
||||
#define AST2700_WDT_RESET1_CRT (1 << 13)
|
||||
#define AST2700_WDT_RESET1_USB20_HOST (1 << 14)
|
||||
#define AST2700_WDT_RESET1_USB11_HOST (1 << 15)
|
||||
#define AST2700_WDT_RESET1_UFS (1 << 16)
|
||||
#define AST2700_WDT_RESET1_EMMC (1 << 17)
|
||||
#define AST2700_WDT_RESET1_AHB_TO_PCIE1 (1 << 18)
|
||||
#define AST2700_WDT_RESET1_XDMA0 (1 << 22)
|
||||
#define AST2700_WDT_RESET1_MCTP1 (1 << 23)
|
||||
#define AST2700_WDT_RESET1_MCTP0 (1 << 24)
|
||||
#define AST2700_WDT_RESET1_JTAG0 (1 << 25)
|
||||
#define AST2700_WDT_RESET1_ECC (1 << 26)
|
||||
#define AST2700_WDT_RESET1_XDMA1 (1 << 27)
|
||||
#define AST2700_WDT_RESET1_DP (1 << 28)
|
||||
#define AST2700_WDT_RESET1_DP_MCU (1 << 29)
|
||||
#define AST2700_WDT_RESET1_AHB_TO_PCIE0 (1 << 31)
|
||||
|
||||
#define AST2700_WDT_RESET1_DEFAULT 0x8207ff71
|
||||
|
||||
#define AST2700_WDT_RESET2_USB3_A_HOST (1 << 0)
|
||||
#define AST2700_WDT_RESET2_USB3_A_VHUB3 (1 << 1)
|
||||
#define AST2700_WDT_RESET2_USB3_A_VHUB2 (1 << 2)
|
||||
#define AST2700_WDT_RESET2_USB3_B_HOST (1 << 3)
|
||||
#define AST2700_WDT_RESET2_USB3_B_VHUB3 (1 << 4)
|
||||
#define AST2700_WDT_RESET2_USB3_B_VHUB2 (1 << 5)
|
||||
#define AST2700_WDT_RESET2_SM3 (1 << 6)
|
||||
#define AST2700_WDT_RESET2_SM4 (1 << 7)
|
||||
#define AST2700_WDT_RESET2_SHA3 (1 << 8)
|
||||
#define AST2700_WDT_RESET2_RSA (1 << 9)
|
||||
|
||||
#define AST2700_WDT_RESET2_DEFAULT 0x000003f6
|
||||
|
||||
#define AST2700_WDT_RESET3_LPC0 (1 << 0)
|
||||
#define AST2700_WDT_RESET3_LPC1 (1 << 1)
|
||||
#define AST2700_WDT_RESET3_MDIO (1 << 2)
|
||||
#define AST2700_WDT_RESET3_PECI (1 << 3)
|
||||
#define AST2700_WDT_RESET3_PWM (1 << 4)
|
||||
#define AST2700_WDT_RESET3_MAC0 (1 << 5)
|
||||
#define AST2700_WDT_RESET3_MAC1 (1 << 6)
|
||||
#define AST2700_WDT_RESET3_MAC2 (1 << 7)
|
||||
#define AST2700_WDT_RESET3_ADC (1 << 8)
|
||||
#define AST2700_WDT_RESET3_SDC (1 << 9)
|
||||
#define AST2700_WDT_RESET3_ESPI0 (1 << 10)
|
||||
#define AST2700_WDT_RESET3_ESPI1 (1 << 11)
|
||||
#define AST2700_WDT_RESET3_JTAG1 (1 << 12)
|
||||
#define AST2700_WDT_RESET3_SPI0 (1 << 13)
|
||||
#define AST2700_WDT_RESET3_SPI1 (1 << 14)
|
||||
#define AST2700_WDT_RESET3_SPI2 (1 << 15)
|
||||
#define AST2700_WDT_RESET3_I3C0 (1 << 16)
|
||||
#define AST2700_WDT_RESET3_I3C1 (1 << 17)
|
||||
#define AST2700_WDT_RESET3_I3C2 (1 << 18)
|
||||
#define AST2700_WDT_RESET3_I3C3 (1 << 19)
|
||||
#define AST2700_WDT_RESET3_I3C4 (1 << 20)
|
||||
#define AST2700_WDT_RESET3_I3C5 (1 << 21)
|
||||
#define AST2700_WDT_RESET3_I3C6 (1 << 22)
|
||||
#define AST2700_WDT_RESET3_I3C7 (1 << 23)
|
||||
#define AST2700_WDT_RESET3_I3C8 (1 << 24)
|
||||
#define AST2700_WDT_RESET3_I3C9 (1 << 25)
|
||||
#define AST2700_WDT_RESET3_I3C10 (1 << 26)
|
||||
#define AST2700_WDT_RESET3_I3C11 (1 << 27)
|
||||
#define AST2700_WDT_RESET3_I3C12 (1 << 28)
|
||||
#define AST2700_WDT_RESET3_I3C13 (1 << 29)
|
||||
#define AST2700_WDT_RESET3_I3C14 (1 << 30)
|
||||
#define AST2700_WDT_RESET3_I3C15 (1 << 31)
|
||||
|
||||
#define AST2700_WDT_RESET3_DEFAULT 0x000093ec
|
||||
|
||||
#define AST2700_WDT_RESET4_FMC (1 << 0)
|
||||
#define AST2700_WDT_RESET4_SOC_MISC1 (1 << 1)
|
||||
#define AST2700_WDT_RESET4_AHB (1 << 2)
|
||||
#define AST2700_WDT_RESET4_SLI1 (1 << 3)
|
||||
#define AST2700_WDT_RESET4_UART0 (1 << 4)
|
||||
#define AST2700_WDT_RESET4_UART1 (1 << 5)
|
||||
#define AST2700_WDT_RESET4_UART2 (1 << 6)
|
||||
#define AST2700_WDT_RESET4_UART3 (1 << 7)
|
||||
#define AST2700_WDT_RESET4_I2C_MONITOR (1 << 8)
|
||||
#define AST2700_WDT_RESET4_HOST_TO_SPI1 (1 << 9)
|
||||
#define AST2700_WDT_RESET4_HOST_TO_SPI2 (1 << 10)
|
||||
#define AST2700_WDT_RESET4_GPIO1 (1 << 11)
|
||||
#define AST2700_WDT_RESET4_FSI (1 << 12)
|
||||
#define AST2700_WDT_RESET4_CANBUS (1 << 13)
|
||||
#define AST2700_WDT_RESET4_MCTP (1 << 14)
|
||||
#define AST2700_WDT_RESET4_XDMA (1 << 15)
|
||||
#define AST2700_WDT_RESET4_UART5 (1 << 16)
|
||||
#define AST2700_WDT_RESET4_UART6 (1 << 17)
|
||||
#define AST2700_WDT_RESET4_UART7 (1 << 18)
|
||||
#define AST2700_WDT_RESET4_UART8 (1 << 19)
|
||||
#define AST2700_WDT_RESET4_BOOT_MCU (1 << 20)
|
||||
#define AST2700_WDT_RESET4_IO_MCU (1 << 21)
|
||||
#define AST2700_WDT_RESET4_LTPI0 (1 << 22)
|
||||
#define AST2700_WDT_RESET4_VGA_LINK (1 << 23)
|
||||
#define AST2700_WDT_RESET4_LTPI1 (1 << 24)
|
||||
#define AST2700_WDT_RESET4_LTPI_PHY (1 << 25)
|
||||
#define AST2700_WDT_RESET4_ACE (1 << 26)
|
||||
#define AST2700_WDT_RESET4_LTPI_GPIO0 (1 << 28)
|
||||
#define AST2700_WDT_RESET4_LTPI_GPIO1 (1 << 29)
|
||||
#define AST2700_WDT_RESET4_AHB_TO_PCIE1 (1 << 30)
|
||||
#define AST2700_WDT_RESET4_I3C_DMA (1 << 31)
|
||||
|
||||
#define AST2700_WDT_RESET4_DEFAULT 0x40303803
|
||||
|
||||
#define AST2700_WDT_RESET5_I2C_GLOBAL (1 << 0)
|
||||
#define AST2700_WDT_RESET5_I2C0 (1 << 1)
|
||||
#define AST2700_WDT_RESET5_I2C1 (1 << 2)
|
||||
#define AST2700_WDT_RESET5_I2C2 (1 << 3)
|
||||
#define AST2700_WDT_RESET5_I2C3 (1 << 4)
|
||||
#define AST2700_WDT_RESET5_I2C4 (1 << 5)
|
||||
#define AST2700_WDT_RESET5_I2C5 (1 << 6)
|
||||
#define AST2700_WDT_RESET5_I2C6 (1 << 7)
|
||||
#define AST2700_WDT_RESET5_I2C7 (1 << 8)
|
||||
#define AST2700_WDT_RESET5_I2C8 (1 << 9)
|
||||
#define AST2700_WDT_RESET5_I2C9 (1 << 10)
|
||||
#define AST2700_WDT_RESET5_I2C10 (1 << 11)
|
||||
#define AST2700_WDT_RESET5_I2C11 (1 << 12)
|
||||
#define AST2700_WDT_RESET5_I2C12 (1 << 13)
|
||||
#define AST2700_WDT_RESET5_I2C13 (1 << 14)
|
||||
#define AST2700_WDT_RESET5_I2C14 (1 << 15)
|
||||
#define AST2700_WDT_RESET5_I2C15 (1 << 16)
|
||||
#define AST2700_WDT_RESET5_UHCI (1 << 17)
|
||||
#define AST2700_WDT_RESET5_USB2_C_UART (1 << 18)
|
||||
#define AST2700_WDT_RESET5_USB2_C (1 << 19)
|
||||
#define AST2700_WDT_RESET5_USB2_D_UART (1 << 20)
|
||||
#define AST2700_WDT_RESET5_USB2_D (1 << 21)
|
||||
|
||||
#define AST2700_WDT_RESET5_DEFAULT 0x00320000
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user