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arm64: dts: imx8mq: Move usdhc clocks assignment to board DT
usdhc's clock rate is different according to different devices connected, so clock rate assignment should be placed in board DT according to different devices connected on each usdhc port. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
@@ -278,6 +278,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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@@ -291,6 +293,8 @@
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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@@ -110,6 +110,8 @@
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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@@ -780,6 +780,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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@@ -790,6 +792,8 @@
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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@@ -191,6 +191,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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bus-width = <8>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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@@ -207,6 +207,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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@@ -217,6 +219,8 @@
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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@@ -170,6 +170,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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@@ -512,6 +512,8 @@
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};
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&usdhc1 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
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@@ -525,6 +527,8 @@
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};
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&usdhc2 {
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
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assigned-clock-rates = <200000000>;
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
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@@ -868,8 +868,6 @@
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<&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
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<&clk IMX8MQ_CLK_USDHC1_ROOT>;
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clock-names = "ipg", "ahb", "per";
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assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
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assigned-clock-rates = <400000000>;
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fsl,tuning-start-tap = <20>;
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fsl,tuning-step = <2>;
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bus-width = <4>;
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