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ARM: sti: drop B2120 board support
B2120 boards are internal boards which never were commercialised. Drop them. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
This commit is contained in:
Raphael Gallais-Pou
committed by
Patrice Chotard
Patrice Chotard
parent
6bbe133ee8
commit
dee546e1ad
@@ -13,8 +13,6 @@ dtb-$(CONFIG_ARCH_SPEAR3XX) += \
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dtb-$(CONFIG_ARCH_SPEAR6XX) += \
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spear600-evb.dtb
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dtb-$(CONFIG_ARCH_STI) += \
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stih407-b2120.dtb \
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stih410-b2120.dtb \
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stih410-b2260.dtb \
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stih418-b2199.dtb \
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stih418-b2264.dtb
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@@ -1,27 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 STMicroelectronics (R&D) Limited.
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* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*/
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/dts-v1/;
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#include "stih407.dtsi"
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#include "stihxxx-b2120.dtsi"
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/ {
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model = "STiH407 B2120";
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compatible = "st,stih407-b2120", "st,stih407";
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chosen {
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stdout-path = &sbc_serial0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x80000000>;
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};
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aliases {
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serial0 = &sbc_serial0;
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ethernet0 = ðernet0;
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};
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};
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@@ -1,145 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2015 STMicroelectronics Limited.
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* Author: Gabriel Fernandez <gabriel.fernandez@linaro.org>
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*/
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#include "stih407-clock.dtsi"
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#include "stih407-family.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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soc {
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sti-display-subsystem@0 {
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compatible = "st,sti-display-subsystem";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0 0>;
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assigned-clocks = <&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>,
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<&clk_s_c0_pll1 0>,
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<&clk_s_c0_flexgen CLK_COMPO_DVP>,
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<&clk_s_c0_flexgen CLK_MAIN_DISP>,
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<&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
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<&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
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<&clk_s_d2_flexgen CLK_PIX_GDP1>,
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<&clk_s_d2_flexgen CLK_PIX_GDP2>,
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<&clk_s_d2_flexgen CLK_PIX_GDP3>,
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<&clk_s_d2_flexgen CLK_PIX_GDP4>;
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assigned-clock-parents = <0>,
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<0>,
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<0>,
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<&clk_s_c0_pll1 0>,
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<&clk_s_c0_pll1 0>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 0>;
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assigned-clock-rates = <297000000>,
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<108000000>,
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<0>,
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<400000000>,
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<400000000>;
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ranges;
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sti-compositor@9d11000 {
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compatible = "st,stih407-compositor";
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reg = <0x9d11000 0x1000>;
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clock-names = "compo_main",
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"compo_aux",
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"pix_main",
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"pix_aux",
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"pix_gdp1",
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"pix_gdp2",
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"pix_gdp3",
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"pix_gdp4",
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"main_parent",
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"aux_parent";
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clocks = <&clk_s_c0_flexgen CLK_COMPO_DVP>,
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<&clk_s_c0_flexgen CLK_COMPO_DVP>,
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<&clk_s_d2_flexgen CLK_PIX_MAIN_DISP>,
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<&clk_s_d2_flexgen CLK_PIX_AUX_DISP>,
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<&clk_s_d2_flexgen CLK_PIX_GDP1>,
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<&clk_s_d2_flexgen CLK_PIX_GDP2>,
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<&clk_s_d2_flexgen CLK_PIX_GDP3>,
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<&clk_s_d2_flexgen CLK_PIX_GDP4>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>;
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reset-names = "compo-main", "compo-aux";
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resets = <&softreset STIH407_COMPO_SOFTRESET>,
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<&softreset STIH407_COMPO_SOFTRESET>;
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st,vtg = <&vtg_main>, <&vtg_aux>;
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};
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sti-tvout@8d08000 {
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compatible = "st,stih407-tvout";
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reg = <0x8d08000 0x1000>;
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reg-names = "tvout-reg";
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reset-names = "tvout";
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resets = <&softreset STIH407_HDTVOUT_SOFTRESET>;
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#address-cells = <1>;
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#size-cells = <1>;
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assigned-clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
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<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
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<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
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<&clk_s_d0_flexgen CLK_PCM_0>,
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<&clk_s_d2_flexgen CLK_PIX_HDDAC>,
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<&clk_s_d2_flexgen CLK_HDDAC>;
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assigned-clock-parents = <&clk_s_d2_quadfs 0>,
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<&clk_tmdsout_hdmi>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d0_quadfs 0>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 0>;
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};
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sti_hdmi: sti-hdmi@8d04000 {
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compatible = "st,stih407-hdmi";
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reg = <0x8d04000 0x1000>;
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reg-names = "hdmi-reg";
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#sound-dai-cells = <0>;
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interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "irq";
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clock-names = "pix",
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"tmds",
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"phy",
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"audio",
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"main_parent",
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"aux_parent";
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clocks = <&clk_s_d2_flexgen CLK_PIX_HDMI>,
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<&clk_s_d2_flexgen CLK_TMDS_HDMI>,
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<&clk_s_d2_flexgen CLK_REF_HDMIPHY>,
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<&clk_s_d0_flexgen CLK_PCM_0>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>;
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hdmi,hpd-gpio = <&pio5 3 GPIO_ACTIVE_LOW>;
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reset-names = "hdmi";
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resets = <&softreset STIH407_HDMI_TX_PHY_SOFTRESET>;
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ddc = <&hdmiddc>;
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};
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sti-hda@8d02000 {
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compatible = "st,stih407-hda";
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reg = <0x8d02000 0x400>, <0x92b0120 0x4>;
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reg-names = "hda-reg", "video-dacs-ctrl";
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clock-names = "pix",
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"hddac",
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"main_parent",
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"aux_parent";
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clocks = <&clk_s_d2_flexgen CLK_PIX_HDDAC>,
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<&clk_s_d2_flexgen CLK_HDDAC>,
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<&clk_s_d2_quadfs 0>,
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<&clk_s_d2_quadfs 1>;
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};
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};
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};
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};
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@@ -1,66 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 STMicroelectronics (R&D) Limited.
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* Author: Peter Griffin <peter.griffin@linaro.org>
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*/
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/dts-v1/;
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#include "stih410.dtsi"
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#include "stihxxx-b2120.dtsi"
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/ {
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model = "STiH410 B2120";
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compatible = "st,stih410-b2120", "st,stih410";
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chosen {
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stdout-path = &sbc_serial0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x40000000 0x80000000>;
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};
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aliases {
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serial0 = &sbc_serial0;
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ethernet0 = ðernet0;
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};
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usb2_picophy1: phy2 {
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status = "okay";
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};
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usb2_picophy2: phy3 {
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status = "okay";
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};
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soc {
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mmc0: sdhci@9060000 {
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max-frequency = <200000000>;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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ohci0: usb@9a03c00 {
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status = "okay";
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};
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ehci0: usb@9a03e00 {
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status = "okay";
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};
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ohci1: usb@9a83c00 {
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status = "okay";
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};
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ehci1: usb@9a83e00 {
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status = "okay";
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};
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sti-display-subsystem@0 {
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sti-hda@8d02000 {
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status = "okay";
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};
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};
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};
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};
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@@ -1,206 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2014 STMicroelectronics (R&D) Limited.
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* Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*/
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#include <dt-bindings/clock/stih407-clks.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/media/c8sectpfe.h>
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/ {
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leds {
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compatible = "gpio-leds";
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led-red {
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label = "Front Panel LED";
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gpios = <&pio4 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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led-green {
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gpios = <&pio1 3 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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sound: sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "STI-B2120";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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simple-audio-card,dai-link@0 {
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reg = <0>;
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/* HDMI */
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format = "i2s";
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mclk-fs = <128>;
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cpu {
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sound-dai = <&sti_uni_player0>;
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};
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codec {
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sound-dai = <&sti_hdmi>;
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};
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};
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simple-audio-card,dai-link@1 {
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reg = <1>;
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/* DAC */
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format = "i2s";
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mclk-fs = <256>;
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frame-inversion;
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cpu {
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sound-dai = <&sti_uni_player2>;
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};
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codec {
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sound-dai = <&sti_sasg_codec 1>;
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};
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};
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simple-audio-card,dai-link@2 {
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reg = <2>;
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/* SPDIF */
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format = "left_j";
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mclk-fs = <128>;
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cpu {
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sound-dai = <&sti_uni_player3>;
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};
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codec {
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sound-dai = <&sti_sasg_codec 0>;
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};
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};
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};
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miphy28lp_phy: miphy28lp {
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phy_port0: port@9b22000 {
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st,osc-rdy;
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};
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phy_port1: port@9b2a000 {
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st,osc-force-ext;
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};
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};
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soc {
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sbc_serial0: serial@9530000 {
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status = "okay";
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};
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pwm0: pwm@9810000 {
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status = "okay";
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};
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pwm1: pwm@9510000 {
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status = "okay";
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};
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ssc2: i2c@9842000 {
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status = "okay";
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clock-frequency = <100000>;
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st,i2c-min-scl-pulse-width-us = <0>;
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st,i2c-min-sda-pulse-width-us = <5>;
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};
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ssc3: i2c@9843000 {
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status = "okay";
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clock-frequency = <100000>;
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st,i2c-min-scl-pulse-width-us = <0>;
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st,i2c-min-sda-pulse-width-us = <5>;
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};
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i2c@9844000 {
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status = "okay";
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};
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i2c@9845000 {
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status = "okay";
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};
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i2c@9540000 {
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status = "okay";
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};
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mmc0: sdhci@9060000 {
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non-removable;
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status = "okay";
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};
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mmc1: sdhci@9080000 {
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status = "okay";
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};
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/* SSC11 to HDMI */
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hdmiddc: i2c@9541000 {
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status = "okay";
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/* HDMI V1.3a supports Standard mode only */
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clock-frequency = <100000>;
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st,i2c-min-scl-pulse-width-us = <0>;
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st,i2c-min-sda-pulse-width-us = <5>;
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};
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st_dwc3: dwc3@8f94000 {
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status = "okay";
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};
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ethernet0: dwmac@9630000 {
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st,tx-retime-src = "clkgen";
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status = "okay";
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phy-mode = "rgmii";
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fixed-link = <0 1 1000 0 0>;
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};
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demux@8a20000 {
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compatible = "st,stih407-c8sectpfe";
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status = "okay";
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reg = <0x08a20000 0x10000>,
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<0x08a00000 0x4000>;
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reg-names = "c8sectpfe", "c8sectpfe-ram";
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "c8sectpfe-error-irq",
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"c8sectpfe-idle-irq";
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pinctrl-0 = <&pinctrl_tsin0_serial>;
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pinctrl-1 = <&pinctrl_tsin0_parallel>;
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pinctrl-2 = <&pinctrl_tsin3_serial>;
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pinctrl-3 = <&pinctrl_tsin4_serial_alt3>;
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pinctrl-4 = <&pinctrl_tsin5_serial_alt1>;
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pinctrl-names = "tsin0-serial",
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"tsin0-parallel",
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"tsin3-serial",
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"tsin4-serial",
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"tsin5-serial";
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clocks = <&clk_s_c0_flexgen CLK_PROC_STFE>;
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clock-names = "c8sectpfe";
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/* tsin0 is TSA on NIMA */
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tsin0: port {
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tsin-num = <0>;
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serial-not-parallel;
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i2c-bus = <&ssc2>;
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reset-gpios = <&pio15 4 GPIO_ACTIVE_LOW>;
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dvb-card = <STV0367_TDA18212_NIMA_1>;
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};
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};
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sti_uni_player0: sti-uni-player@8d80000 {
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status = "okay";
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};
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sti_uni_player2: sti-uni-player@8d82000 {
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status = "okay";
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};
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sti_uni_player3: sti-uni-player@8d85000 {
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status = "okay";
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};
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syscfg_core: core-syscfg@92b0000 {
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sti_sasg_codec: sti-sasg-codec {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spdif_out>;
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};
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};
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};
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};
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