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arm64: dts: imx: minor whitespace cleanup around '='

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The DTS code coding style expects exactly one space before and after '='
sign.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
2023-07-02 20:51:48 +02:00
committed by Shawn Guo
parent 258bd86381
commit ca788bb10a
9 changed files with 25 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
View File

@@ -69,7 +69,7 @@
mdio-parent-bus = <&emdio1>;
reg = <0x54 1>; /* BRDCFG4 */
mux-mask = <0xe0>; /* EMI1_MDIO */
#address-cells=<1>;
#address-cells = <1>;
#size-cells = <0>;
/* Child MDIO buses, one for each riser card:

4
arch/arm64/boot/dts/freescale/imx8mp.dtsi
View File

@@ -701,7 +701,7 @@
snvs_rtc: snvs-rtc-lp {
compatible = "fsl,sec-v4.0-mon-rtc-lp";
regmap =<&snvs>;
regmap = <&snvs>;
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
@@ -854,7 +854,7 @@
pgc_vpumix: power-domain@19 {
#power-domain-cells = <0>;
reg = <IMX8MP_POWER_DOMAIN_VPUMIX>;
clocks =<&clk IMX8MP_CLK_VPU_ROOT>;
clocks = <&clk IMX8MP_CLK_VPU_ROOT>;
};
pgc_vpu_g1: power-domain@20 {

2
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@@ -633,7 +633,7 @@
snvs_rtc: snvs-rtc-lp{
compatible = "fsl,sec-v4.0-mon-rtc-lp";
regmap =<&snvs>;
regmap = <&snvs>;
offset = <0x34>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/freescale/imx8x-colibri-aster.dtsi
View File

@@ -35,7 +35,7 @@
/* Colibri UART_A */
&lpuart3 {
status= "okay";
status = "okay";
};
/* Colibri SDCard */

2
arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
View File

@@ -77,7 +77,7 @@
/* Colibri UART_A */
&lpuart3 {
status= "okay";
status = "okay";
};
&lsio_gpio3 {

6
arch/arm64/boot/dts/freescale/imx93.dtsi
View File

@@ -742,7 +742,7 @@
clock-names = "ipg", "ahb", "per";
bus-width = <8>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
@@ -756,7 +756,7 @@
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
@@ -819,7 +819,7 @@
clock-names = "ipg", "ahb", "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
fsl,tuning-step = <2>;
status = "disabled";
};
};