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arm64: dts: qcom: correct gpio-ranges for QCS8300

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Correct the gpio-ranges for the QCS8300 TLMM pin controller to include
GPIOs 0-132 and the UFS_RESET pin for primary UFS memory reset.

Fixes: 7be190e4bd ("arm64: dts: qcom: add QCS8300 platform")
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219-correct_gpio_ranges-v2-6-19af8588dbd0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Lijuan Gao
2024-12-19 15:59:48 +08:00
committed by Bjorn Andersson
parent 80c8282732
commit c57c39ee52
1 changed files with 1 additions and 1 deletions
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2
arch/arm64/boot/dts/qcom/qcs8300.dtsi
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@@ -2762,7 +2762,7 @@
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&tlmm 0 0 133>;
gpio-ranges = <&tlmm 0 0 134>;
interrupt-controller;
#interrupt-cells = <2>;
wakeup-parent = <&pdc>;