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drm/amdgpu: Add logic for VF ipd and VF bios to init from dynamic crit_region offsets
1. Added VF logic in amdgpu_virt to init IP discovery using the offsets from dynamic(v2) critical regions; 2. Added VF logic in amdgpu_virt to init bios image using the offsets from dynamic(v2) critical regions; Signed-off-by: Ellen Pan <yunru.pan@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -96,11 +96,12 @@ void amdgpu_bios_release(struct amdgpu_device *adev)
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* part of the system bios. On boot, the system bios puts a
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* copy of the igp rom at the start of vram if a discrete card is
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* present.
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* For SR-IOV, the vbios image is also put in VRAM in the VF.
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* For SR-IOV, if dynamic critical region is not enabled,
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* the vbios image is also put at the start of VRAM in the VF.
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*/
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static bool amdgpu_read_bios_from_vram(struct amdgpu_device *adev)
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{
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uint8_t __iomem *bios;
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uint8_t __iomem *bios = NULL;
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resource_size_t vram_base;
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resource_size_t size = 256 * 1024; /* ??? */
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@@ -114,18 +115,33 @@ static bool amdgpu_read_bios_from_vram(struct amdgpu_device *adev)
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adev->bios = NULL;
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vram_base = pci_resource_start(adev->pdev, 0);
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bios = ioremap_wc(vram_base, size);
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if (!bios)
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return false;
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adev->bios = kmalloc(size, GFP_KERNEL);
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if (!adev->bios) {
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iounmap(bios);
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if (!adev->bios)
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return false;
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/* For SRIOV with dynamic critical region is enabled,
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* the vbios image is put at a dynamic offset of VRAM in the VF.
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* If dynamic critical region is disabled, follow the existing logic as on baremetal.
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*/
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if (amdgpu_sriov_vf(adev) && adev->virt.is_dynamic_crit_regn_enabled) {
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if (amdgpu_virt_get_dynamic_data_info(adev,
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AMD_SRIOV_MSG_VBIOS_IMG_TABLE_ID, adev->bios, (uint64_t *)&size)) {
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amdgpu_bios_release(adev);
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return false;
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}
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} else {
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bios = ioremap_wc(vram_base, size);
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if (!bios) {
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amdgpu_bios_release(adev);
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return false;
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}
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memcpy_fromio(adev->bios, bios, size);
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iounmap(bios);
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}
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adev->bios_size = size;
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memcpy_fromio(adev->bios, bios, size);
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iounmap(bios);
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if (!check_atom_bios(adev, size)) {
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amdgpu_bios_release(adev);
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@@ -304,10 +304,26 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
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* then it is not required to be reserved.
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*/
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if (sz_valid) {
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uint64_t pos = vram_size - DISCOVERY_TMR_OFFSET;
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amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,
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adev->discovery.size, false);
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adev->discovery.reserve_tmr = true;
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if (amdgpu_sriov_vf(adev) && adev->virt.is_dynamic_crit_regn_enabled) {
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/* For SRIOV VFs with dynamic critical region enabled,
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* we will get the IPD binary via below call.
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* If dynamic critical is disabled, fall through to normal seq.
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*/
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if (amdgpu_virt_get_dynamic_data_info(adev,
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AMD_SRIOV_MSG_IPD_TABLE_ID, binary,
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(uint64_t *)&adev->discovery.size)) {
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dev_err(adev->dev,
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"failed to read discovery info from dynamic critical region.");
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ret = -EINVAL;
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goto exit;
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}
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} else {
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uint64_t pos = vram_size - DISCOVERY_TMR_OFFSET;
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amdgpu_device_vram_access(adev, pos, (uint32_t *)binary,
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adev->discovery.size, false);
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adev->discovery.reserve_tmr = true;
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}
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} else {
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ret = amdgpu_discovery_read_binary_from_sysmem(adev, binary);
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}
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@@ -316,7 +332,7 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
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dev_err(adev->dev,
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"failed to read discovery info from memory, vram size read: %llx",
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vram_size);
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exit:
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return ret;
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}
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@@ -1008,6 +1008,14 @@ int amdgpu_virt_init_critical_region(struct amdgpu_device *adev)
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init_data_hdr->bad_page_size_in_kb;
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}
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/* Validation for critical region info */
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if (adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_IPD_TABLE_ID].size_kb > DISCOVERY_TMR_SIZE) {
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dev_err(adev->dev, "Invalid IP discovery size: 0x%x\n",
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adev->virt.crit_regn_tbl[AMD_SRIOV_MSG_IPD_TABLE_ID].size_kb);
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r = -EINVAL;
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goto out;
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}
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/* reserved memory starts from crit region base offset with the size of 5MB */
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adev->mman.fw_vram_usage_start_offset = adev->virt.crit_regn.offset;
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adev->mman.fw_vram_usage_size = adev->virt.crit_regn.size_kb << 10;
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@@ -1026,6 +1034,35 @@ out:
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return r;
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}
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int amdgpu_virt_get_dynamic_data_info(struct amdgpu_device *adev,
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int data_id, uint8_t *binary, uint64_t *size)
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{
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uint32_t data_offset = 0;
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uint32_t data_size = 0;
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enum amd_sriov_msg_table_id_enum data_table_id = data_id;
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if (data_table_id >= AMD_SRIOV_MSG_MAX_TABLE_ID)
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return -EINVAL;
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data_offset = adev->virt.crit_regn_tbl[data_table_id].offset;
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data_size = adev->virt.crit_regn_tbl[data_table_id].size_kb << 10;
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/* Validate on input params */
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if (!binary || !size || *size < (uint64_t)data_size)
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return -EINVAL;
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/* Proceed to copy the dynamic content */
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amdgpu_device_vram_access(adev,
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(uint64_t)data_offset, (uint32_t *)binary, data_size, false);
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*size = (uint64_t)data_size;
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dev_dbg(adev->dev,
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"Got %s info from dynamic crit_region_table at offset 0x%x with size of 0x%x bytes.\n",
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amdgpu_virt_dynamic_crit_table_name[data_id], data_offset, data_size);
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return 0;
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}
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void amdgpu_virt_init(struct amdgpu_device *adev)
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{
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bool is_sriov = false;
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@@ -442,6 +442,8 @@ void amdgpu_virt_fini_data_exchange(struct amdgpu_device *adev);
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void amdgpu_virt_init(struct amdgpu_device *adev);
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int amdgpu_virt_init_critical_region(struct amdgpu_device *adev);
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int amdgpu_virt_get_dynamic_data_info(struct amdgpu_device *adev,
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int data_id, uint8_t *binary, uint64_t *size);
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bool amdgpu_virt_can_access_debugfs(struct amdgpu_device *adev);
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int amdgpu_virt_enable_access_debugfs(struct amdgpu_device *adev);
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