diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts index 5c94d8cf28c4..8caf0c68ba9f 100644 --- a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts +++ b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts @@ -225,27 +225,11 @@ /* X44 mPCIe */ &pcie0 { - pinctrl-0 = <&pinctrl_pcie0>; - pinctrl-names = "default"; - clocks = <&scmi_clk IMX95_CLK_HSIO>, - <&pcieclk 1>, - <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; - reset-gpio = <&expander2 9 GPIO_ACTIVE_LOW>; status = "okay"; }; /* X22 PCIe x1 socket */ &pcie1 { - pinctrl-0 = <&pinctrl_pcie1>; - pinctrl-names = "default"; - clocks = <&scmi_clk IMX95_CLK_HSIO>, - <&pcieclk 0>, - <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, - <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; - reset-gpio = <&expander2 10 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi index e7edeec712dc..832c753abcd7 100644 --- a/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi @@ -391,6 +391,28 @@ }; }; +&pcie0 { + pinctrl-0 = <&pinctrl_pcie0>; + pinctrl-names = "default"; + clocks = <&scmi_clk IMX95_CLK_HSIO>, + <&pcieclk 1>, + <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + reset-gpio = <&expander2 9 GPIO_ACTIVE_LOW>; +}; + +&pcie1 { + pinctrl-0 = <&pinctrl_pcie1>; + pinctrl-names = "default"; + clocks = <&scmi_clk IMX95_CLK_HSIO>, + <&pcieclk 0>, + <&scmi_clk IMX95_CLK_HSIOPLL_VCO>, + <&scmi_clk IMX95_CLK_HSIOPCIEAUX>; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_aux"; + reset-gpio = <&expander2 10 GPIO_ACTIVE_LOW>; +}; + &sai3 { #sound-dai-cells = <0>; pinctrl-names = "default";