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arm64: dts: meson: Add DDR PMU node

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Add DDR PMU device node for G12 series SoC

Signed-off-by: Jiucheng Xu <jiucheng.xu@amlogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20221109015818.194927-4-jiucheng.xu@amlogic.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Jiucheng Xu
2022-11-09 09:58:18 +08:00
committed by Neil Armstrong
parent 49f65e2eaa
commit 90cf8e2101
4 changed files with 18 additions and 0 deletions
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6
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
View File

@@ -1705,6 +1705,12 @@
}; };
}; };
pmu: pmu@ff638000 {
reg = <0x0 0xff638000 0x0 0x100>,
<0x0 0xff638c00 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
};
aobus: bus@ff800000 { aobus: bus@ff800000 {
compatible = "simple-bus"; compatible = "simple-bus";
reg = <0x0 0xff800000 0x0 0x100000>; reg = <0x0 0xff800000 0x0 0x100000>;

4
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
View File

@@ -134,3 +134,7 @@
}; };
}; };
}; };
&pmu {
compatible = "amlogic,g12a-ddr-pmu";
};

4
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
View File

@@ -140,3 +140,7 @@
&mali { &mali {
dma-coherent; dma-coherent;
}; };
&pmu {
compatible = "amlogic,g12b-ddr-pmu";
};

4
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
View File

@@ -521,6 +521,10 @@
power-domains = <&pwrc PWRC_SM1_PCIE_ID>; power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
}; };
&pmu {
compatible = "amlogic,sm1-ddr-pmu";
};
&pwrc { &pwrc {
compatible = "amlogic,meson-sm1-pwrc"; compatible = "amlogic,meson-sm1-pwrc";
}; };