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arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller

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Enable the cmu_hsi2 clock management unit. It feeds some of
the high speed interfaces such as PCIe and UFS.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-2-f233be0a2455@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
This commit is contained in:
Peter Griffin
2024-04-29 14:02:18 +01:00
committed by Krzysztof Kozlowski
parent 4982a4a209
commit 86124c7668
1 changed files with 12 additions and 0 deletions
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12
arch/arm64/boot/dts/exynos/google/gs101.dtsi
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@@ -1267,6 +1267,18 @@
interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
};
cmu_hsi2: clock-controller@14400000 {
compatible = "google,gs101-cmu-hsi2";
reg = <0x14400000 0x4000>;
#clock-cells = <1>;
clocks = <&ext_24_5m>,
<&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
<&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
<&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
<&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
};
pinctrl_hsi2: pinctrl@14440000 {
compatible = "google,gs101-pinctrl";
reg = <0x14440000 0x00001000>;