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clk: milbeaut: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <bmasney@redhat.com>
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@@ -386,8 +386,8 @@ static unsigned long m10v_clk_divider_recalc_rate(struct clk_hw *hw,
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divider->flags, divider->width);
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divider->flags, divider->width);
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}
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}
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static long m10v_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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static int m10v_clk_divider_determine_rate(struct clk_hw *hw,
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unsigned long *prate)
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struct clk_rate_request *req)
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{
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{
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struct m10v_clk_divider *divider = to_m10v_div(hw);
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struct m10v_clk_divider *divider = to_m10v_div(hw);
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@@ -398,13 +398,19 @@ static long m10v_clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
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val = readl(divider->reg) >> divider->shift;
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val = readl(divider->reg) >> divider->shift;
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val &= clk_div_mask(divider->width);
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val &= clk_div_mask(divider->width);
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return divider_ro_round_rate(hw, rate, prate, divider->table,
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req->rate = divider_ro_round_rate(hw, req->rate,
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divider->width, divider->flags,
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&req->best_parent_rate,
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val);
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divider->table,
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divider->width,
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divider->flags, val);
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return 0;
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}
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}
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return divider_round_rate(hw, rate, prate, divider->table,
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req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
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divider->width, divider->flags);
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divider->table, divider->width, divider->flags);
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return 0;
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}
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}
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static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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@@ -450,7 +456,7 @@ static int m10v_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
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static const struct clk_ops m10v_clk_divider_ops = {
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static const struct clk_ops m10v_clk_divider_ops = {
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.recalc_rate = m10v_clk_divider_recalc_rate,
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.recalc_rate = m10v_clk_divider_recalc_rate,
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.round_rate = m10v_clk_divider_round_rate,
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.determine_rate = m10v_clk_divider_determine_rate,
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.set_rate = m10v_clk_divider_set_rate,
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.set_rate = m10v_clk_divider_set_rate,
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};
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};
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