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arm64: dts: rockchip: Add Edgeble NCM6A-IO M.2 M-Key

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Edgeble NCM6A-IO board has M.2 M-Key via PCI3x4.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-8-jagan@edgeble.ai
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jagan Teki
2023-11-26 00:35:19 +05:30
committed by Heiko Stuebner
parent 8c711ff327
commit 5d85d4c7e0
1 changed files with 36 additions and 0 deletions
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36
arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi
View File

@@ -18,6 +18,19 @@
startup-delay-us = <5000>;
vin-supply = <&vcc_3v3_s3>;
};
vcc3v3_pcie3x4: vcc3v3-pcie3x4-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; /* PCIE30x4_PWREN_H */
pinctrl-names = "default";
pinctrl-0 = <&pcie3x4_vcc3v3_en>;
regulator-name = "vcc3v3_pcie3x4";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
vin-supply = <&vcc5v0_sys>;
};
};
&combphy0_ps {
@@ -53,6 +66,19 @@
status = "okay";
};
&pcie30phy {
status = "okay";
};
/* M-Key */
&pcie3x4 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3x4_rst>;
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; /* PCIE30X2_PERSTn_M1_L */
vpcie3v3-supply = <&vcc3v3_pcie3x4>;
status = "okay";
};
&pinctrl {
pcie2 {
pcie2_0_rst: pcie2-0-rst {
@@ -60,6 +86,16 @@
};
};
pcie3 {
pcie3x4_rst: pcie3x4-rst {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie3x4_vcc3v3_en: pcie3x4-vcc3v3-en {
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;