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ARM: OMAP4+: PRM: add support for passing status register/bit info to reset
AM43xx has slightly different reset register layout compared to OMAP4+, with varying status bit shifts and status register offsets. Current code assumes static offsets and identical status / reset control bit shifts, which is wrong. This patch adds PRM core support for passing the actual implementations from hwmod code. AM43xx mappings will be fixed in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Dave Gerlach <d-gerlach@ti.com> Reported-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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committed by
Paul Walmsley
parent
9a55706221
commit
4ebf5b288c
@@ -171,6 +171,12 @@
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*/
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#define LINKS_PER_OCP_IF 2
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/*
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* Address offset (in bytes) between the reset control and the reset
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* status registers: 4 bytes on OMAP4
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*/
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#define OMAP4_RST_CTRL_ST_OFFSET 4
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/**
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* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
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* @enable_module: function to enable a module (via MODULEMODE)
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@@ -3016,10 +3022,12 @@ static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
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if (ohri->st_shift)
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pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
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oh->name, ohri->name);
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return omap_prm_deassert_hardreset(ohri->rst_shift, 0,
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return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
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oh->clkdm->pwrdm.ptr->prcm_partition,
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oh->clkdm->pwrdm.ptr->prcm_offs,
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oh->prcm.omap4.rstctrl_offs, 0);
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oh->prcm.omap4.rstctrl_offs,
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oh->prcm.omap4.rstctrl_offs +
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OMAP4_RST_CTRL_ST_OFFSET);
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}
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/**
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