net: stmmac: Add glue layer for StarFive JH7110 SoC

This adds StarFive dwmac driver support on the StarFive JH7110 SoC.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Samin Guo
2023-04-17 18:02:50 +08:00
committed by Paolo Abeni
parent b76eaf7d7e
commit 4bd3bb7b45
4 changed files with 137 additions and 0 deletions

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@@ -19933,6 +19933,7 @@ M: Emil Renner Berthing <kernel@esmil.dk>
M: Samin Guo <samin.guo@starfivetech.com> M: Samin Guo <samin.guo@starfivetech.com>
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml F: Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
F: drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
STARFIVE JH7100 CLOCK DRIVERS STARFIVE JH7100 CLOCK DRIVERS
M: Emil Renner Berthing <kernel@esmil.dk> M: Emil Renner Berthing <kernel@esmil.dk>

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@@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
for the stmmac device driver. This driver is used for for the stmmac device driver. This driver is used for
arria5 and cyclone5 FPGA SoCs. arria5 and cyclone5 FPGA SoCs.
config DWMAC_STARFIVE
tristate "StarFive dwmac support"
depends on OF && (ARCH_STARFIVE || COMPILE_TEST)
select MFD_SYSCON
default m if ARCH_STARFIVE
help
Support for ethernet controllers on StarFive RISC-V SoCs
This selects the StarFive platform specific glue layer support for
the stmmac device driver. This driver is used for StarFive JH7110
ethernet controller.
config DWMAC_STI config DWMAC_STI
tristate "STi GMAC support" tristate "STi GMAC support"
default ARCH_STI default ARCH_STI

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@@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o
obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STARFIVE) += dwmac-starfive.o
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o

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@@ -0,0 +1,123 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* StarFive DWMAC platform driver
*
* Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
* Copyright (C) 2022 StarFive Technology Co., Ltd.
*
*/
#include <linux/mfd/syscon.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#include "stmmac_platform.h"
struct starfive_dwmac {
struct device *dev;
struct clk *clk_tx;
};
static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed)
{
struct starfive_dwmac *dwmac = priv;
unsigned long rate;
int err;
rate = clk_get_rate(dwmac->clk_tx);
switch (speed) {
case SPEED_1000:
rate = 125000000;
break;
case SPEED_100:
rate = 25000000;
break;
case SPEED_10:
rate = 2500000;
break;
default:
dev_err(dwmac->dev, "invalid speed %u\n", speed);
break;
}
err = clk_set_rate(dwmac->clk_tx, rate);
if (err)
dev_err(dwmac->dev, "failed to set tx rate %lu\n", rate);
}
static int starfive_dwmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
struct stmmac_resources stmmac_res;
struct starfive_dwmac *dwmac;
struct clk *clk_gtx;
int err;
err = stmmac_get_platform_resources(pdev, &stmmac_res);
if (err)
return dev_err_probe(&pdev->dev, err,
"failed to get resources\n");
plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
if (IS_ERR(plat_dat))
return dev_err_probe(&pdev->dev, PTR_ERR(plat_dat),
"dt configuration failed\n");
dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
if (!dwmac)
return -ENOMEM;
dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx");
if (IS_ERR(dwmac->clk_tx))
return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx),
"error getting tx clock\n");
clk_gtx = devm_clk_get_enabled(&pdev->dev, "gtx");
if (IS_ERR(clk_gtx))
return dev_err_probe(&pdev->dev, PTR_ERR(clk_gtx),
"error getting gtx clock\n");
/* Generally, the rgmii_tx clock is provided by the internal clock,
* which needs to match the corresponding clock frequency according
* to different speeds. If the rgmii_tx clock is provided by the
* external rgmii_rxin, there is no need to configure the clock
* internally, because rgmii_rxin will be adaptively adjusted.
*/
if (!device_property_read_bool(&pdev->dev, "starfive,tx-use-rgmii-clk"))
plat_dat->fix_mac_speed = starfive_dwmac_fix_mac_speed;
dwmac->dev = &pdev->dev;
plat_dat->bsp_priv = dwmac;
plat_dat->dma_cfg->dche = true;
err = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
if (err) {
stmmac_remove_config_dt(pdev, plat_dat);
return err;
}
return 0;
}
static const struct of_device_id starfive_dwmac_match[] = {
{ .compatible = "starfive,jh7110-dwmac" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, starfive_dwmac_match);
static struct platform_driver starfive_dwmac_driver = {
.probe = starfive_dwmac_probe,
.remove = stmmac_pltfr_remove,
.driver = {
.name = "starfive-dwmac",
.pm = &stmmac_pltfr_pm_ops,
.of_match_table = starfive_dwmac_match,
},
};
module_platform_driver(starfive_dwmac_driver);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("StarFive DWMAC platform driver");
MODULE_AUTHOR("Emil Renner Berthing <kernel@esmil.dk>");
MODULE_AUTHOR("Samin Guo <samin.guo@starfivetech.com>");