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arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode

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Add rock5b overlays for PCIe endpoint mode support.

If using the rock5b as an endpoint against a normal PC, only the
rk3588-rock-5b-pcie-ep.dtbo needs to be applied.

If using two rock5b:s, with one board as EP and the other board as RC,
rk3588-rock-5b-pcie-ep.dtbo and rk3588-rock-5b-pcie-srns.dtbo has to
be applied to the respective boards.

Signed-off-by: Niklas Cassel <cassel@kernel.org>
Link: https://lore.kernel.org/r/20240607-rockchip-pcie-ep-v1-v5-13-0a042d6b0049@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Niklas Cassel
2024-06-07 13:14:33 +02:00
committed by Heiko Stuebner
parent 7ef44e179a
commit 4065853475
3 changed files with 43 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/rockchip/Makefile
View File

@@ -129,6 +129,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-ep.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b-pcie-srns.dtbo
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-tiger-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-turing-rk1.dtb

25
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-ep.dtso Normal file
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@@ -0,0 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* DT-overlay to run the PCIe3_4L Dual Mode controller in Endpoint mode
* in the SRNS (Separate Reference Clock No Spread) configuration.
*
* NOTE: If using a setup with two ROCK 5B:s, with one board running in
* RC mode and the other board running in EP mode, see also the device
* tree overlay: rk3588-rock-5b-pcie-srns.dtso.
*/
/dts-v1/;
/plugin/;
&pcie30phy {
rockchip,rx-common-refclk-mode = <0 0 0 0>;
};
&pcie3x4 {
status = "disabled";
};
&pcie3x4_ep {
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

16
arch/arm64/boot/dts/rockchip/rk3588-rock-5b-pcie-srns.dtso Normal file
View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* DT-overlay to run the PCIe3_4L Dual Mode controller in Root Complex
* mode in the SRNS (Separate Reference Clock No Spread) configuration.
*
* This device tree overlay is only needed (on the RC side) when running
* a setup with two ROCK 5B:s, with one board running in RC mode and the
* other board running in EP mode.
*/
/dts-v1/;
/plugin/;
&pcie30phy {
rockchip,rx-common-refclk-mode = <0 0 0 0>;
};