admin/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2025-12-07 20:06:24 +00:00
Code Issues Packages Projects Releases Wiki Activity

drm/xe: Cleanup some layering in GGTT

Browse Source 
xe_ggtt.c touched GuC layers which is incorrect. Call into
xe_gt_tlb_invalidation layer instead.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240222232021.3911545-3-matthew.brost@intel.com
This commit is contained in:
Matthew Brost
2024-02-22 15:20:20 -08:00
parent ddadc7120d
commit 3121fed0c5
4 changed files with 54 additions and 33 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
drivers/gpu/drm/xe/regs/xe_guc_regs.h
View File

@@ -110,6 +110,13 @@
#define MED_VF_SW_FLAG(n) XE_REG(0x190310 + (n) * 4)
#define MED_VF_SW_FLAG_COUNT 4
#define GUC_TLB_INV_CR XE_REG(0xcee8)
#define GUC_TLB_INV_CR_INVALIDATE REG_BIT(0)
#define PVC_GUC_TLB_INV_DESC0 XE_REG(0xcf7c)
#define PVC_GUC_TLB_INV_DESC0_VALID REG_BIT(0)
#define PVC_GUC_TLB_INV_DESC1 XE_REG(0xcf80)
#define PVC_GUC_TLB_INV_DESC1_INVALIDATE REG_BIT(6)
/* GuC Interrupt Vector */
#define GUC_INTR_GUC2HOST REG_BIT(15)
#define GUC_INTR_EXEC_ERROR REG_BIT(14)

37
drivers/gpu/drm/xe/xe_ggtt.c
View File

@@ -19,7 +19,6 @@
#include "xe_gt_printk.h"
#include "xe_gt_tlb_invalidation.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_sriov.h"
#include "xe_wopcm.h"
@@ -249,15 +248,11 @@ err:
return err;
}
#define GUC_TLB_INV_CR XE_REG(0xcee8)
#define GUC_TLB_INV_CR_INVALIDATE REG_BIT(0)
#define PVC_GUC_TLB_INV_DESC0 XE_REG(0xcf7c)
#define PVC_GUC_TLB_INV_DESC0_VALID REG_BIT(0)
#define PVC_GUC_TLB_INV_DESC1 XE_REG(0xcf80)
#define PVC_GUC_TLB_INV_DESC1_INVALIDATE REG_BIT(6)
static void ggtt_invalidate_gt_tlb(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
int err;
if (!gt)
return;
@@ -267,29 +262,9 @@ static void ggtt_invalidate_gt_tlb(struct xe_gt *gt)
* and GuC are accessible.
*/
xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
/* TODO: vfunc for GuC vs. non-GuC */
if (gt->uc.guc.submission_state.enabled) {
int seqno;
seqno = xe_gt_tlb_invalidation_guc(gt);
xe_gt_assert(gt, seqno > 0);
if (seqno > 0)
xe_gt_tlb_invalidation_wait(gt, seqno);
} else if (xe_device_uc_enabled(gt_to_xe(gt))) {
struct xe_device *xe = gt_to_xe(gt);
if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC1,
PVC_GUC_TLB_INV_DESC1_INVALIDATE);
xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC0,
PVC_GUC_TLB_INV_DESC0_VALID);
} else
xe_mmio_write32(gt, GUC_TLB_INV_CR,
GUC_TLB_INV_CR_INVALIDATE);
}
err = xe_gt_tlb_invalidation_ggtt(gt);
if (err)
drm_warn(&xe->drm, "xe_gt_tlb_invalidation_ggtt error=%d", err);
xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
}

41
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c
View File

@@ -11,7 +11,9 @@
#include "xe_gt_printk.h"
#include "xe_guc.h"
#include "xe_guc_ct.h"
#include "xe_mmio.h"
#include "xe_trace.h"
#include "regs/xe_guc_regs.h"
#define TLB_TIMEOUT (HZ / 4)
@@ -210,7 +212,7 @@ static int send_tlb_invalidation(struct xe_guc *guc,
* Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
* negative error code on error.
*/
int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
{
u32 action[] = {
XE_GUC_ACTION_TLB_INVALIDATION,
@@ -222,6 +224,43 @@ int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
ARRAY_SIZE(action));
}
/**
* xe_gt_tlb_invalidation_ggtt - Issue a TLB invalidation on this GT for the GGTT
* @gt: graphics tile
*
* Issue a TLB invalidation for the GGTT. Completion of TLB invalidation is
* synchronous.
*
* Return: 0 on success, negative error code on error
*/
int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt)
{
struct xe_device *xe = gt_to_xe(gt);
if (xe_guc_ct_enabled(&gt->uc.guc.ct) &&
gt->uc.guc.submission_state.enabled) {
int seqno;
seqno = xe_gt_tlb_invalidation_guc(gt);
if (seqno <= 0)
return seqno;
xe_gt_tlb_invalidation_wait(gt, seqno);
} else if (xe_device_uc_enabled(xe)) {
if (xe->info.platform == XE_PVC || GRAPHICS_VER(xe) >= 20) {
xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC1,
PVC_GUC_TLB_INV_DESC1_INVALIDATE);
xe_mmio_write32(gt, PVC_GUC_TLB_INV_DESC0,
PVC_GUC_TLB_INV_DESC0_VALID);
} else {
xe_mmio_write32(gt, GUC_TLB_INV_CR,
GUC_TLB_INV_CR_INVALIDATE);
}
}
return 0;
}
/**
* xe_gt_tlb_invalidation_vma - Issue a TLB invalidation on this GT for a VMA
* @gt: graphics tile

2
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
View File

@@ -16,7 +16,7 @@ struct xe_vma;
int xe_gt_tlb_invalidation_init(struct xe_gt *gt);
void xe_gt_tlb_invalidation_reset(struct xe_gt *gt);
int xe_gt_tlb_invalidation_guc(struct xe_gt *gt);
int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt);
int xe_gt_tlb_invalidation_vma(struct xe_gt *gt,
struct xe_gt_tlb_invalidation_fence *fence,
struct xe_vma *vma);