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Merge tag 'edac_urgent_for_v6.15_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC fixes from Borislav Petkov:
"Two fixes to the AMD translation library for the MI300 side of things:
- Use the row[13] bit when calculating the memory row to retire
- Mask the physical row address in order to avoid creating duplicate
error records"
* tag 'edac_urgent_for_v6.15_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
RAS/AMD/FMPM: Get masked address
RAS/AMD/ATL: Include row[13] bit in row retirement
This commit is contained in:
@@ -362,4 +362,7 @@ static inline void atl_debug_on_bad_intlv_mode(struct addr_ctx *ctx)
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atl_debug(ctx, "Unrecognized interleave mode: %u", ctx->map.intlv_mode);
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atl_debug(ctx, "Unrecognized interleave mode: %u", ctx->map.intlv_mode);
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}
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}
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#define MI300_UMC_MCA_COL GENMASK(5, 1)
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#define MI300_UMC_MCA_ROW13 BIT(23)
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#endif /* __AMD_ATL_INTERNAL_H__ */
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#endif /* __AMD_ATL_INTERNAL_H__ */
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@@ -229,7 +229,6 @@ int get_umc_info_mi300(void)
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* Additionally, the PC and Bank bits may be hashed. This must be accounted for before
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* Additionally, the PC and Bank bits may be hashed. This must be accounted for before
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* reconstructing the normalized address.
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* reconstructing the normalized address.
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*/
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*/
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#define MI300_UMC_MCA_COL GENMASK(5, 1)
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#define MI300_UMC_MCA_BANK GENMASK(9, 6)
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#define MI300_UMC_MCA_BANK GENMASK(9, 6)
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#define MI300_UMC_MCA_ROW GENMASK(24, 10)
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#define MI300_UMC_MCA_ROW GENMASK(24, 10)
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#define MI300_UMC_MCA_PC BIT(25)
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#define MI300_UMC_MCA_PC BIT(25)
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@@ -320,7 +319,7 @@ static unsigned long convert_dram_to_norm_addr_mi300(unsigned long addr)
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* See amd_atl::convert_dram_to_norm_addr_mi300() for MI300 address formats.
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* See amd_atl::convert_dram_to_norm_addr_mi300() for MI300 address formats.
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*/
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*/
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#define MI300_NUM_COL BIT(HWEIGHT(MI300_UMC_MCA_COL))
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#define MI300_NUM_COL BIT(HWEIGHT(MI300_UMC_MCA_COL))
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static void retire_row_mi300(struct atl_err *a_err)
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static void _retire_row_mi300(struct atl_err *a_err)
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{
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{
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unsigned long addr;
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unsigned long addr;
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struct page *p;
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struct page *p;
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@@ -351,6 +350,22 @@ static void retire_row_mi300(struct atl_err *a_err)
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}
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}
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}
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}
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/*
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* In addition to the column bits, the row[13] bit should also be included when
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* calculating addresses affected by a physical row.
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*
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* Instead of running through another loop over a single bit, just run through
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* the column bits twice and flip the row[13] bit in-between.
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*
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* See MI300_UMC_MCA_ROW for the row bits in MCA_ADDR_UMC value.
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*/
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static void retire_row_mi300(struct atl_err *a_err)
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{
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_retire_row_mi300(a_err);
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a_err->addr ^= MI300_UMC_MCA_ROW13;
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_retire_row_mi300(a_err);
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}
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void amd_retire_dram_row(struct atl_err *a_err)
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void amd_retire_dram_row(struct atl_err *a_err)
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{
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{
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if (df_cfg.rev == DF4p5 && df_cfg.flags.heterogeneous)
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if (df_cfg.rev == DF4p5 && df_cfg.flags.heterogeneous)
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@@ -250,6 +250,13 @@ static bool rec_has_valid_entries(struct fru_rec *rec)
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return true;
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return true;
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}
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}
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/*
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* Row retirement is done on MI300 systems, and some bits are 'don't
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* care' for comparing addresses with unique physical rows. This
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* includes all column bits and the row[13] bit.
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*/
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#define MASK_ADDR(addr) ((addr) & ~(MI300_UMC_MCA_ROW13 | MI300_UMC_MCA_COL))
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static bool fpds_equal(struct cper_fru_poison_desc *old, struct cper_fru_poison_desc *new)
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static bool fpds_equal(struct cper_fru_poison_desc *old, struct cper_fru_poison_desc *new)
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{
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{
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/*
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/*
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@@ -258,7 +265,7 @@ static bool fpds_equal(struct cper_fru_poison_desc *old, struct cper_fru_poison_
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*
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*
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* Also, order the checks from most->least likely to fail to shortcut the code.
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* Also, order the checks from most->least likely to fail to shortcut the code.
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*/
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*/
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if (old->addr != new->addr)
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if (MASK_ADDR(old->addr) != MASK_ADDR(new->addr))
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return false;
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return false;
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if (old->hw_id != new->hw_id)
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if (old->hw_id != new->hw_id)
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