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drm/amdgpu: Remove redundant return value

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gfx_v9_4_3_xcc_kcq_init_queue doesn't have a fail condition.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar
2025-09-16 11:20:42 +05:30
committed by Alex Deucher
parent 4944e470a2
commit 17f5bd9551
1 changed files with 6 additions and 12 deletions
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18
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
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@@ -2152,7 +2152,8 @@ static int gfx_v9_4_3_xcc_kiq_init_queue(struct amdgpu_ring *ring, int xcc_id)
return 0; return 0;
} }
static int gfx_v9_4_3_xcc_kcq_init_queue(struct amdgpu_ring *ring, int xcc_id, bool restore) static void gfx_v9_4_3_xcc_kcq_init_queue(struct amdgpu_ring *ring, int xcc_id,
bool restore)
{ {
struct amdgpu_device *adev = ring->adev; struct amdgpu_device *adev = ring->adev;
struct v9_mqd *mqd = ring->mqd_ptr; struct v9_mqd *mqd = ring->mqd_ptr;
@@ -2186,8 +2187,6 @@ static int gfx_v9_4_3_xcc_kcq_init_queue(struct amdgpu_ring *ring, int xcc_id, b
atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0); atomic64_set((atomic64_t *)&adev->wb.wb[ring->wptr_offs], 0);
amdgpu_ring_clear_ring(ring); amdgpu_ring_clear_ring(ring);
} }
return 0;
} }
static int gfx_v9_4_3_xcc_kcq_fini_register(struct amdgpu_device *adev, int xcc_id) static int gfx_v9_4_3_xcc_kcq_fini_register(struct amdgpu_device *adev, int xcc_id)
@@ -2220,7 +2219,7 @@ static int gfx_v9_4_3_xcc_kiq_resume(struct amdgpu_device *adev, int xcc_id)
static int gfx_v9_4_3_xcc_kcq_resume(struct amdgpu_device *adev, int xcc_id) static int gfx_v9_4_3_xcc_kcq_resume(struct amdgpu_device *adev, int xcc_id)
{ {
struct amdgpu_ring *ring; struct amdgpu_ring *ring;
int i, r; int i;
gfx_v9_4_3_xcc_cp_compute_enable(adev, true, xcc_id); gfx_v9_4_3_xcc_cp_compute_enable(adev, true, xcc_id);
@@ -2228,9 +2227,7 @@ static int gfx_v9_4_3_xcc_kcq_resume(struct amdgpu_device *adev, int xcc_id)
ring = &adev->gfx.compute_ring[i + xcc_id * ring = &adev->gfx.compute_ring[i + xcc_id *
adev->gfx.num_compute_rings]; adev->gfx.num_compute_rings];
r = gfx_v9_4_3_xcc_kcq_init_queue(ring, xcc_id, false); gfx_v9_4_3_xcc_kcq_init_queue(ring, xcc_id, false);
if (r)
return r;
} }
return amdgpu_gfx_enable_kcq(adev, xcc_id); return amdgpu_gfx_enable_kcq(adev, xcc_id);
@@ -3605,11 +3602,8 @@ pipe_reset:
return r; return r;
} }
r = gfx_v9_4_3_xcc_kcq_init_queue(ring, ring->xcc_id, true); gfx_v9_4_3_xcc_kcq_init_queue(ring, ring->xcc_id, true);
if (r) {
dev_err(adev->dev, "fail to init kcq\n");
return r;
}
spin_lock_irqsave(&kiq->ring_lock, flags); spin_lock_irqsave(&kiq->ring_lock, flags);
r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size);
if (r) { if (r) {