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arm64: dts: ti: Add support for AM62D2-EVM
AM62D-EVM evaluation module (EVM) is a low-cost expandable platform board designed for AM62D2 SoC from TI. It supports the following interfaces: * 4 GB LPDDR4 RAM * x2 Gigabit Ethernet expansion connectors * x4 3.5mm TRS Audio Jack Line In * x4 3.5mm TRS Audio Jack Line Out * x2 Audio expansion connectors * x1 Type-A USB 2.0, x1 Type-C dual-role device (DRD) USB 2.0 * x1 UHS-1 capable micro SD card slot * 32 GB eMMC Flash * 512 Mb OSPI NOR flash * x4 UARTs via USB 2.0-B * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs Although AM62D2 and AM62A7 differ in peripheral capabilities example multimedia, VPAC, and display subsystems, the core architecture remains same. To reduce duplication, AM62D support reuses the AM62A dtsi and the necessary overrides will be handled in SOC specific dtsi file and a board specific dts. Add basic support for AM62D2-EVM. Schematics Link - https://www.ti.com/lit/zip/sprcal5 Signed-off-by: Paresh Bhagat <p-bhagat@ti.com> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Andrew Davis <afd@ti.com> Reviewed-by: Bryan Brattlof <bb@ti.com> Link: https://lore.kernel.org/r/20250708085839.1498505-5-p-bhagat@ti.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Paresh Bhagat
committed by
Vignesh Raghavendra
Vignesh Raghavendra
parent
106f43ab41
commit
1544bca2f1
@@ -33,6 +33,9 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-pocketbeagle2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
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# Boards with AM62Dx SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62d2-evm.dtb
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# Boards with AM62Px SoC
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# Boards with AM62Px SoC
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am62p5-verdin-nonwifi-dahlia.dtb
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615
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
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615
arch/arm64/boot/dts/ti/k3-am62d2-evm.dts
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@@ -0,0 +1,615 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* AM62D2 EVM: https://www.ti.com/lit/zip/sprcal5
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*
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* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/net/ti-dp83867.h>
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#include "k3-am62d2.dtsi"
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/ {
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compatible = "ti,am62d2-evm", "ti,am62d2";
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model = "Texas Instruments AM62D2 EVM";
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aliases {
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serial0 = &wkup_uart0;
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serial1 = &mcu_uart0;
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serial2 = &main_uart0;
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mmc0 = &sdhci0;
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mmc1 = &sdhci1;
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rtc0 = &wkup_rtc0;
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ethernet0 = &cpsw_port1;
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ethernet1 = &cpsw_port2;
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};
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chosen {
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stdout-path = &main_uart0;
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};
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memory@80000000 {
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device_type = "memory";
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/* 4G RAM */
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>,
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<0x00000008 0x80000000 0x00000000 0x80000000>;
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bootph-all;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* global cma region */
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x00 0x2000000>;
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alloc-ranges = <0x00 0xc0000000 0x00 0x2000000>;
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linux,cma-default;
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};
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secure_tfa_ddr: tfa@80000000 {
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reg = <0x00 0x80000000 0x00 0x80000>;
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no-map;
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};
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c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x99800000 0x00 0x100000>;
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no-map;
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};
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c7x_0_memory_region: c7x-memory@99900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x99900000 0x00 0xf00000>;
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no-map;
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};
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mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b800000 0x00 0x100000>;
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no-map;
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};
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mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9b900000 0x00 0xf00000>;
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no-map;
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};
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wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9c800000 0x00 0x100000>;
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no-map;
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};
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wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0x9c900000 0x00 0xf00000>;
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no-map;
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bootph-pre-ram;
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};
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
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no-map;
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};
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rtos_ipc_memory_region: ipc-memories@a0000000 {
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compatible = "shared-dma-pool";
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reg = <0x00 0xa0000000 0x00 0x01000000>;
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no-map;
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};
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};
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opp-table {
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/* Requires VDD_CORE at 0v85 */
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opp-1400000000 {
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opp-hz = /bits/ 64 <1400000000>;
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opp-supported-hw = <0x01 0x0004>;
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clock-latency-ns = <6000000>;
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};
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};
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vout_pd: regulator-0 {
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/* TPS65988 PD CONTROLLER OUTPUT */
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compatible = "regulator-fixed";
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regulator-name = "vout_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vmain_pd: regulator-1 {
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/* Output of TPS22811 */
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compatible = "regulator-fixed";
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regulator-name = "vmain_pd";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vout_pd>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vcc_5v0: regulator-2 {
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/* Output of TPS630702RNMR */
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compatible = "regulator-fixed";
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regulator-name = "vcc_5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vcc_3v3_main: regulator-3 {
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/* output of LM5141-Q1 */
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_main";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vmain_pd>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vdd_mmc1: regulator-4 {
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/* TPS22918DBVR */
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compatible = "regulator-fixed";
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regulator-name = "vdd_mmc1";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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enable-active-high;
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gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
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bootph-all;
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};
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vcc_3v3_sys: regulator-5 {
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/* output of TPS222965DSGT */
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3_sys";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&vcc_3v3_main>;
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regulator-always-on;
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regulator-boot-on;
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bootph-all;
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};
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vddshv_sdio: regulator-6 {
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compatible = "regulator-gpio";
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regulator-name = "vddshv_sdio";
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pinctrl-names = "default";
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pinctrl-0 = <&vddshv_sdio_pins_default>;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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gpios = <&main_gpio1 31 GPIO_ACTIVE_HIGH>;
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states = <1800000 0x0>,
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<3300000 0x1>;
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bootph-all;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&usr_led_pins_default>;
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led-0 {
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label = "am62d-evm:green:heartbeat";
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gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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function = LED_FUNCTION_HEARTBEAT;
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default-state = "off";
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};
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};
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};
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&mcu_pmx0 {
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status = "okay";
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pmic_irq_pins_default: pmic-irq-default-pins {
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pinctrl-single,pins = <
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AM62DX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */
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>;
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};
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wkup_uart0_pins_default: wkup-uart0-default-pins {
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pinctrl-single,pins = <
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AM62DX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */
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AM62DX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */
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AM62DX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */
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AM62DX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */
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>;
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bootph-all;
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};
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};
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/* WKUP UART0 is used for DM firmware logs */
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&wkup_uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&wkup_uart0_pins_default>;
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bootph-all;
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status = "reserved";
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};
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&main_pmx0 {
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main_uart0_pins_default: main-uart0-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x01c8, PIN_INPUT, 0) /* (E14) UART0_RXD */
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AM62DX_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */
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>;
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bootph-all;
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};
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main_i2c0_pins_default: main-i2c0-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (D17) I2C0_SCL */
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AM62DX_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (E16) I2C0_SDA */
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>;
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bootph-all;
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};
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main_i2c1_pins_default: main-i2c1-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (C17) I2C1_SCL */
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AM62DX_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (E17) I2C1_SDA */
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>;
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bootph-all;
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};
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main_i2c2_pins_default: main-i2c2-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (M22) GPMC0_CSn2.I2C2_SCL */
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AM62DX_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (M20) GPMC0_CSn3.I2C2_SDA */
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>;
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};
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main_mmc0_pins_default: main-mmc0-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x0220, PIN_INPUT_PULLUP, 0) /* (Y6) MMC0_CMD */
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AM62DX_IOPAD(0x0218, PIN_OUTPUT, 0) /* (AB7) MMC0_CLK */
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AM62DX_IOPAD(0x0214, PIN_INPUT_PULLUP, 0) /* (AA6) MMC0_DAT0 */
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AM62DX_IOPAD(0x0210, PIN_INPUT_PULLUP, 0) /* (AB6) MMC0_DAT1 */
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AM62DX_IOPAD(0x020c, PIN_INPUT_PULLUP, 0) /* (Y7) MMC0_DAT2 */
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AM62DX_IOPAD(0x0208, PIN_INPUT_PULLUP, 0) /* (AA7) MMC0_DAT3 */
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AM62DX_IOPAD(0x0204, PIN_INPUT_PULLUP, 0) /* (Y8) MMC0_DAT4 */
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AM62DX_IOPAD(0x0200, PIN_INPUT_PULLUP, 0) /* (W7) MMC0_DAT5 */
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AM62DX_IOPAD(0x01fc, PIN_INPUT_PULLUP, 0) /* (W9) MMC0_DAT6 */
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AM62DX_IOPAD(0x01f8, PIN_INPUT_PULLUP, 0) /* (AB8) MMC0_DAT7 */
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>;
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bootph-all;
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};
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main_mmc1_pins_default: main-mmc1-default-pins {
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pinctrl-single,pins = <
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AM62DX_IOPAD(0x023c, PIN_INPUT, 0) /* (C21) MMC1_CMD */
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AM62DX_IOPAD(0x0234, PIN_OUTPUT, 0) /* (E22) MMC1_CLK */
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AM62DX_IOPAD(0x0230, PIN_INPUT, 0) /* (B22) MMC1_DAT0 */
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AM62DX_IOPAD(0x022c, PIN_INPUT, 0) /* (D21) MMC1_DAT1 */
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AM62DX_IOPAD(0x0228, PIN_INPUT, 0) /* (C22) MMC1_DAT2 */
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AM62DX_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
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AM62DX_IOPAD(0x0240, PIN_INPUT, 0) /* (E18) MMC1_SDCD */
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>;
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bootph-all;
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};
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||||||
|
main_mdio0_pins_default: main-mdio0-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */
|
||||||
|
AM62DX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */
|
||||||
|
>;
|
||||||
|
bootph-all;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_rgmii1_pins_default: main-rgmii1-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */
|
||||||
|
AM62DX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */
|
||||||
|
AM62DX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */
|
||||||
|
AM62DX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */
|
||||||
|
AM62DX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */
|
||||||
|
AM62DX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */
|
||||||
|
AM62DX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */
|
||||||
|
AM62DX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */
|
||||||
|
AM62DX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */
|
||||||
|
AM62DX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */
|
||||||
|
AM62DX_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AB17) RGMII1_TXC */
|
||||||
|
AM62DX_IOPAD(0x012c, PIN_OUTPUT, 0) /* (W16) RGMII1_TX_CTL */
|
||||||
|
>;
|
||||||
|
bootph-all;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_rgmii2_pins_default: main-rgmii2-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x0184, PIN_INPUT, 0) /* (AA21) RGMII2_RD0 */
|
||||||
|
AM62DX_IOPAD(0x0188, PIN_INPUT, 0) /* (Y20) RGMII2_RD1 */
|
||||||
|
AM62DX_IOPAD(0x018c, PIN_INPUT, 0) /* (AB21) RGMII2_RD2 */
|
||||||
|
AM62DX_IOPAD(0x0190, PIN_INPUT, 0) /* (AB20) RGMII2_RD3 */
|
||||||
|
AM62DX_IOPAD(0x0180, PIN_INPUT, 0) /* (AA20) RGMII2_RXC */
|
||||||
|
AM62DX_IOPAD(0x017c, PIN_INPUT, 0) /* (W18) RGMII2_RX_CTL */
|
||||||
|
AM62DX_IOPAD(0x016c, PIN_INPUT, 0) /* (AA19) RGMII2_TD0 */
|
||||||
|
AM62DX_IOPAD(0x0170, PIN_INPUT, 0) /* (Y18) RGMII2_TD1 */
|
||||||
|
AM62DX_IOPAD(0x0174, PIN_INPUT, 0) /* (AA18) RGMII2_TD2 */
|
||||||
|
AM62DX_IOPAD(0x0178, PIN_INPUT, 0) /* (W17) RGMII2_TD3 */
|
||||||
|
AM62DX_IOPAD(0x0168, PIN_OUTPUT, 0) /* (AB19) RGMII2_TXC */
|
||||||
|
AM62DX_IOPAD(0x0164, PIN_OUTPUT, 0) /* (Y19) RGMII2_TX_CTL */
|
||||||
|
>;
|
||||||
|
bootph-all;
|
||||||
|
};
|
||||||
|
|
||||||
|
main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
|
||||||
|
vddshv_sdio_pins_default: vddshv-sdio-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x1f4, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO1_31 */
|
||||||
|
>;
|
||||||
|
bootph-all;
|
||||||
|
};
|
||||||
|
|
||||||
|
usr_led_pins_default: usr-led-default-pins {
|
||||||
|
pinctrl-single,pins = <
|
||||||
|
AM62DX_IOPAD(0x0244, PIN_INPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */
|
||||||
|
>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mcu_gpio0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_i2c0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_i2c0_pins_default>;
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
typec_pd0: usb-power-controller@3f {
|
||||||
|
compatible = "ti,tps6598x";
|
||||||
|
reg = <0x3f>;
|
||||||
|
|
||||||
|
connector {
|
||||||
|
compatible = "usb-c-connector";
|
||||||
|
label = "USB-C";
|
||||||
|
self-powered;
|
||||||
|
data-role = "dual";
|
||||||
|
power-role = "sink";
|
||||||
|
port {
|
||||||
|
usb_con_hs: endpoint {
|
||||||
|
remote-endpoint = <&usb0_hs_ep>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
exp1: gpio@22 {
|
||||||
|
compatible = "ti,tca6424";
|
||||||
|
reg = <0x22>;
|
||||||
|
gpio-controller;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
interrupt-parent = <&main_gpio1>;
|
||||||
|
interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
|
||||||
|
interrupt-controller;
|
||||||
|
#interrupt-cells = <2>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
|
||||||
|
bootph-all;
|
||||||
|
|
||||||
|
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
|
||||||
|
"","MMC1_SD_EN",
|
||||||
|
"VPP_EN", "GPIO_DIX_RST",
|
||||||
|
"IO_EXP_OPT_EN", "DIX_INT",
|
||||||
|
"GPIO_eMMC_RSTn", "CPLD2_DONE",
|
||||||
|
"CPLD2_INTN", "CPLD1_DONE",
|
||||||
|
"CPLD1_INTN", "USB_TYPEA_OC_INDICATION",
|
||||||
|
"PCM1_INT", "PCM2_INT",
|
||||||
|
"GPIO_PCM1_RST", "TEST_GPIO2",
|
||||||
|
"GPIO_PCM2_RST", "",
|
||||||
|
"IO_MCAN0_STB", "IO_MCAN1_STB",
|
||||||
|
"PD_I2C_IRQ", "IO_EXP_TEST_LED";
|
||||||
|
};
|
||||||
|
|
||||||
|
exp2: gpio@20 {
|
||||||
|
compatible = "ti,tca6416";
|
||||||
|
reg = <0x20>;
|
||||||
|
gpio-controller;
|
||||||
|
#gpio-cells = <2>;
|
||||||
|
|
||||||
|
gpio-line-names = "PCM6240_BUF_IO_EN", "",
|
||||||
|
"CPLD1_JTAGENB", "CPLD1_PROGRAMN",
|
||||||
|
"CPLD2_JTAGENB", "CPLD2_PROGRAMN",
|
||||||
|
"", "",
|
||||||
|
"", "CPLD1_TCK",
|
||||||
|
"CPLD1_TMS", "CPLD1_TDI",
|
||||||
|
"CPLD1_TDO", "CPLD2_TCK",
|
||||||
|
"CPLD2_TMS", "CPLD2_TDI",
|
||||||
|
"CPLD2_TDO", "ADDR1_IO_EXP",
|
||||||
|
"SoC_I2C0_SCL", "SoC_I2C0_SDA";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_i2c1 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||||
|
clock-frequency = <100000>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_i2c2 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_i2c2_pins_default>;
|
||||||
|
clock-frequency = <400000>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&sdhci0 {
|
||||||
|
/* eMMC */
|
||||||
|
non-removable;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_mmc0_pins_default>;
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&sdhci1 {
|
||||||
|
/* SD/MMC */
|
||||||
|
vmmc-supply = <&vdd_mmc1>;
|
||||||
|
vqmmc-supply = <&vddshv_sdio>;
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||||
|
disable-wp;
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_gpio0 {
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_gpio1 {
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_gpio_intr {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&main_uart0 {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_uart0_pins_default>;
|
||||||
|
bootph-all;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&usb0 {
|
||||||
|
usb-role-switch;
|
||||||
|
|
||||||
|
port {
|
||||||
|
usb0_hs_ep: endpoint {
|
||||||
|
remote-endpoint = <&usb_con_hs>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw3g {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_rgmii1_pins_default>,
|
||||||
|
<&main_rgmii2_pins_default>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
cpts@3d000 {
|
||||||
|
/* MAP HW3_TS_PUSH to GENF1 */
|
||||||
|
ti,pps = <2 1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_port1 {
|
||||||
|
phy-mode = "rgmii-id";
|
||||||
|
phy-handle = <&cpsw3g_phy0>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw_port2 {
|
||||||
|
phy-mode = "rgmii-id";
|
||||||
|
phy-handle = <&cpsw3g_phy1>;
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&cpsw3g_mdio {
|
||||||
|
pinctrl-names = "default";
|
||||||
|
pinctrl-0 = <&main_mdio0_pins_default>;
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
cpsw3g_phy0: ethernet-phy@0 {
|
||||||
|
reg = <0>;
|
||||||
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||||
|
ti,min-output-impedance;
|
||||||
|
};
|
||||||
|
|
||||||
|
cpsw3g_phy1: ethernet-phy@3 {
|
||||||
|
reg = <3>;
|
||||||
|
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
|
||||||
|
ti,min-output-impedance;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox0_cluster0 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
mbox_r5_0: mbox-r5-0 {
|
||||||
|
ti,mbox-rx = <0 0 0>;
|
||||||
|
ti,mbox-tx = <1 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox0_cluster1 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
mbox_c7x_0: mbox-c7x-0 {
|
||||||
|
ti,mbox-rx = <0 0 0>;
|
||||||
|
ti,mbox-tx = <1 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&mailbox0_cluster2 {
|
||||||
|
status = "okay";
|
||||||
|
|
||||||
|
mbox_mcu_r5_0: mbox-mcu-r5-0 {
|
||||||
|
ti,mbox-rx = <0 0 0>;
|
||||||
|
ti,mbox-tx = <1 0 0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&wkup_r5fss0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&wkup_r5fss0_core0 {
|
||||||
|
mboxes = <&mailbox0_cluster0 &mbox_r5_0>;
|
||||||
|
memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
|
||||||
|
<&wkup_r5fss0_core0_memory_region>;
|
||||||
|
bootph-pre-ram;
|
||||||
|
};
|
||||||
|
|
||||||
|
&mcu_r5fss0 {
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mcu_r5fss0_core0 {
|
||||||
|
mboxes = <&mailbox0_cluster2 &mbox_mcu_r5_0>;
|
||||||
|
memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
|
||||||
|
<&mcu_r5fss0_core0_memory_region>;
|
||||||
|
firmware-name = "am62d-mcu-r5f0_0-fw";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
&c7x_0 {
|
||||||
|
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
|
||||||
|
memory-region = <&c7x_0_dma_memory_region>,
|
||||||
|
<&c7x_0_memory_region>;
|
||||||
|
firmware-name = "am62d-c71_0-fw";
|
||||||
|
status = "okay";
|
||||||
|
};
|
||||||
|
|
||||||
|
/* main_rti4 is used by C7x DSP */
|
||||||
|
&main_rti4 {
|
||||||
|
status = "reserved";
|
||||||
|
};
|
||||||
20
arch/arm64/boot/dts/ti/k3-am62d2.dtsi
Normal file
20
arch/arm64/boot/dts/ti/k3-am62d2.dtsi
Normal file
@@ -0,0 +1,20 @@
|
|||||||
|
// SPDX-License-Identifier: GPL-2.0-only OR MIT
|
||||||
|
/*
|
||||||
|
* Device Tree Source for AM62D2 SoC family in Quad core configuration
|
||||||
|
*
|
||||||
|
* TRM: https://www.ti.com/lit/pdf/sprujd4
|
||||||
|
*
|
||||||
|
* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "k3-am62a7.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Texas Instruments K3 AM62D SoC";
|
||||||
|
compatible = "ti,am62d2";
|
||||||
|
};
|
||||||
|
|
||||||
|
/delete-node/ &vpu; /* Video Codec is disabled in AM62D2 SoC */
|
||||||
|
/delete-node/ &e5010; /* JPEG Encoder is disabled in AM62D2 SoC */
|
||||||
Reference in New Issue
Block a user