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accel/amdxdna: Enhance runtime power management
Currently, pm_runtime_resume_and_get() is invoked in the driver's open callback, and pm_runtime_put_autosuspend() is called in the close callback. As a result, the device remains active whenever an application opens it, even if no I/O is performed, leading to unnecessary power consumption. Move the runtime PM calls to the AIE2 callbacks that actually interact with the hardware. The device will automatically suspend after 5 seconds of inactivity (no hardware accesses and no pending commands), and it will be resumed on the next hardware access. Reviewed-by: Karol Wachowski <karol.wachowski@linux.intel.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Link: https://lore.kernel.org/r/20250923152229.1303625-1-lizhi.hou@amd.com
This commit is contained in:
@@ -14,6 +14,7 @@ amdxdna-y := \
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amdxdna_mailbox.o \
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amdxdna_mailbox_helper.o \
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amdxdna_pci_drv.o \
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amdxdna_pm.o \
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amdxdna_sysfs.o \
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amdxdna_ubuf.o \
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npu1_regs.o \
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@@ -21,6 +21,7 @@
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#include "amdxdna_gem.h"
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#include "amdxdna_mailbox.h"
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#include "amdxdna_pci_drv.h"
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#include "amdxdna_pm.h"
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static bool force_cmdlist;
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module_param(force_cmdlist, bool, 0600);
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@@ -88,7 +89,7 @@ static int aie2_hwctx_restart(struct amdxdna_dev *xdna, struct amdxdna_hwctx *hw
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goto out;
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}
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ret = aie2_config_cu(hwctx);
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ret = aie2_config_cu(hwctx, NULL);
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if (ret) {
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XDNA_ERR(xdna, "Config cu failed, ret %d", ret);
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goto out;
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@@ -167,14 +168,11 @@ static int aie2_hwctx_resume_cb(struct amdxdna_hwctx *hwctx, void *arg)
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int aie2_hwctx_resume(struct amdxdna_client *client)
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{
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struct amdxdna_dev *xdna = client->xdna;
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/*
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* The resume path cannot guarantee that mailbox channel can be
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* regenerated. If this happen, when submit message to this
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* mailbox channel, error will return.
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*/
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drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));
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return amdxdna_hwctx_walk(client, NULL, aie2_hwctx_resume_cb);
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}
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@@ -184,6 +182,8 @@ aie2_sched_notify(struct amdxdna_sched_job *job)
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struct dma_fence *fence = job->fence;
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trace_xdna_job(&job->base, job->hwctx->name, "signaled fence", job->seq);
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amdxdna_pm_suspend_put(job->hwctx->client->xdna);
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job->hwctx->priv->completed++;
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dma_fence_signal(fence);
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@@ -531,7 +531,7 @@ int aie2_hwctx_init(struct amdxdna_hwctx *hwctx)
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.num_rqs = DRM_SCHED_PRIORITY_COUNT,
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.credit_limit = HWCTX_MAX_CMDS,
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.timeout = msecs_to_jiffies(HWCTX_MAX_TIMEOUT),
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.name = hwctx->name,
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.name = "amdxdna_js",
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.dev = xdna->ddev.dev,
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};
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struct drm_gpu_scheduler *sched;
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@@ -697,6 +697,14 @@ void aie2_hwctx_fini(struct amdxdna_hwctx *hwctx)
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kfree(hwctx->cus);
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}
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static int aie2_config_cu_resp_handler(void *handle, void __iomem *data, size_t size)
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{
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struct amdxdna_hwctx *hwctx = handle;
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amdxdna_pm_suspend_put(hwctx->client->xdna);
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return 0;
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}
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static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size)
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{
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struct amdxdna_hwctx_param_config_cu *config = buf;
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@@ -728,10 +736,14 @@ static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size
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if (!hwctx->cus)
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return -ENOMEM;
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ret = aie2_config_cu(hwctx);
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ret = amdxdna_pm_resume_get(xdna);
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if (ret)
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goto free_cus;
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ret = aie2_config_cu(hwctx, aie2_config_cu_resp_handler);
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if (ret) {
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XDNA_ERR(xdna, "Config CU to firmware failed, ret %d", ret);
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goto free_cus;
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goto pm_suspend_put;
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}
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wmb(); /* To avoid locking in command submit when check status */
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@@ -739,6 +751,8 @@ static int aie2_hwctx_cu_config(struct amdxdna_hwctx *hwctx, void *buf, u32 size
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return 0;
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pm_suspend_put:
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amdxdna_pm_suspend_put(xdna);
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free_cus:
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kfree(hwctx->cus);
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hwctx->cus = NULL;
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@@ -862,11 +876,15 @@ int aie2_cmd_submit(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,
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goto free_chain;
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}
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ret = amdxdna_pm_resume_get(xdna);
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if (ret)
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goto cleanup_job;
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retry:
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ret = drm_gem_lock_reservations(job->bos, job->bo_cnt, &acquire_ctx);
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if (ret) {
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XDNA_WARN(xdna, "Failed to lock BOs, ret %d", ret);
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goto cleanup_job;
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goto suspend_put;
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}
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for (i = 0; i < job->bo_cnt; i++) {
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@@ -874,7 +892,7 @@ retry:
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if (ret) {
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XDNA_WARN(xdna, "Failed to reserve fences %d", ret);
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drm_gem_unlock_reservations(job->bos, job->bo_cnt, &acquire_ctx);
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goto cleanup_job;
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goto suspend_put;
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}
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}
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@@ -889,12 +907,12 @@ retry:
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msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);
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} else if (time_after(jiffies, timeout)) {
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ret = -ETIME;
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goto cleanup_job;
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goto suspend_put;
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}
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ret = aie2_populate_range(abo);
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if (ret)
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goto cleanup_job;
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goto suspend_put;
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goto retry;
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}
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}
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@@ -920,6 +938,8 @@ retry:
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return 0;
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suspend_put:
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amdxdna_pm_suspend_put(xdna);
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cleanup_job:
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drm_sched_job_cleanup(&job->base);
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free_chain:
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@@ -37,7 +37,7 @@ static int aie2_send_mgmt_msg_wait(struct amdxdna_dev_hdl *ndev,
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if (!ndev->mgmt_chann)
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return -ENODEV;
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drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));
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drm_WARN_ON(&xdna->ddev, xdna->rpm_on && !mutex_is_locked(&xdna->dev_lock));
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ret = xdna_send_msg_wait(xdna, ndev->mgmt_chann, msg);
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if (ret == -ETIME) {
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xdna_mailbox_stop_channel(ndev->mgmt_chann);
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@@ -377,15 +377,17 @@ int aie2_register_asyn_event_msg(struct amdxdna_dev_hdl *ndev, dma_addr_t addr,
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return xdna_mailbox_send_msg(ndev->mgmt_chann, &msg, TX_TIMEOUT);
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}
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int aie2_config_cu(struct amdxdna_hwctx *hwctx)
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int aie2_config_cu(struct amdxdna_hwctx *hwctx,
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int (*notify_cb)(void *, void __iomem *, size_t))
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{
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struct mailbox_channel *chann = hwctx->priv->mbox_chann;
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struct amdxdna_dev *xdna = hwctx->client->xdna;
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u32 shift = xdna->dev_info->dev_mem_buf_shift;
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DECLARE_AIE2_MSG(config_cu, MSG_OP_CONFIG_CU);
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struct config_cu_req req = { 0 };
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struct xdna_mailbox_msg msg;
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struct drm_gem_object *gobj;
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struct amdxdna_gem_obj *abo;
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int ret, i;
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int i;
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if (!chann)
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return -ENODEV;
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@@ -423,18 +425,12 @@ int aie2_config_cu(struct amdxdna_hwctx *hwctx)
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}
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req.num_cus = hwctx->cus->num_cus;
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ret = xdna_send_msg_wait(xdna, chann, &msg);
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if (ret == -ETIME)
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aie2_destroy_context(xdna->dev_handle, hwctx);
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if (resp.status == AIE2_STATUS_SUCCESS) {
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XDNA_DBG(xdna, "Configure %d CUs, ret %d", req.num_cus, ret);
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return 0;
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}
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XDNA_ERR(xdna, "Command opcode 0x%x failed, status 0x%x ret %d",
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msg.opcode, resp.status, ret);
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return ret;
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msg.send_data = (u8 *)&req;
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msg.send_size = sizeof(req);
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msg.handle = hwctx;
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msg.opcode = MSG_OP_CONFIG_CU;
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msg.notify_cb = notify_cb;
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return xdna_mailbox_send_msg(chann, &msg, TX_TIMEOUT);
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}
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int aie2_execbuf(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,
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@@ -25,6 +25,7 @@
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#include "amdxdna_gem.h"
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#include "amdxdna_mailbox.h"
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#include "amdxdna_pci_drv.h"
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#include "amdxdna_pm.h"
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static int aie2_max_col = XRS_MAX_COL;
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module_param(aie2_max_col, uint, 0600);
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@@ -223,15 +224,6 @@ static int aie2_mgmt_fw_init(struct amdxdna_dev_hdl *ndev)
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return ret;
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}
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if (!ndev->async_events)
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return 0;
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ret = aie2_error_async_events_send(ndev);
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if (ret) {
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XDNA_ERR(ndev->xdna, "Send async events failed");
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return ret;
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}
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return 0;
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}
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@@ -257,6 +249,8 @@ static int aie2_mgmt_fw_query(struct amdxdna_dev_hdl *ndev)
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return ret;
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}
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ndev->total_col = min(aie2_max_col, ndev->metadata.cols);
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return 0;
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}
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@@ -338,6 +332,7 @@ static void aie2_hw_stop(struct amdxdna_dev *xdna)
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ndev->mbox = NULL;
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aie2_psp_stop(ndev->psp_hdl);
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aie2_smu_fini(ndev);
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aie2_error_async_events_free(ndev);
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pci_disable_device(pdev);
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ndev->dev_status = AIE2_DEV_INIT;
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@@ -424,6 +419,18 @@ static int aie2_hw_start(struct amdxdna_dev *xdna)
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goto destroy_mgmt_chann;
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}
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ret = aie2_mgmt_fw_query(ndev);
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if (ret) {
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XDNA_ERR(xdna, "failed to query fw, ret %d", ret);
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goto destroy_mgmt_chann;
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}
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ret = aie2_error_async_events_alloc(ndev);
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if (ret) {
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XDNA_ERR(xdna, "Allocate async events failed, ret %d", ret);
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goto destroy_mgmt_chann;
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}
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ndev->dev_status = AIE2_DEV_START;
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return 0;
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@@ -459,7 +466,6 @@ static int aie2_hw_resume(struct amdxdna_dev *xdna)
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struct amdxdna_client *client;
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int ret;
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guard(mutex)(&xdna->dev_lock);
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ret = aie2_hw_start(xdna);
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if (ret) {
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XDNA_ERR(xdna, "Start hardware failed, %d", ret);
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@@ -565,13 +571,6 @@ static int aie2_init(struct amdxdna_dev *xdna)
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goto release_fw;
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}
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ret = aie2_mgmt_fw_query(ndev);
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if (ret) {
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XDNA_ERR(xdna, "Query firmware failed, ret %d", ret);
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goto stop_hw;
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}
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ndev->total_col = min(aie2_max_col, ndev->metadata.cols);
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xrs_cfg.clk_list.num_levels = ndev->max_dpm_level + 1;
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for (i = 0; i < xrs_cfg.clk_list.num_levels; i++)
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xrs_cfg.clk_list.cu_clk_list[i] = ndev->priv->dpm_clk_tbl[i].hclk;
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@@ -587,30 +586,10 @@ static int aie2_init(struct amdxdna_dev *xdna)
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goto stop_hw;
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}
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ret = aie2_error_async_events_alloc(ndev);
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if (ret) {
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XDNA_ERR(xdna, "Allocate async events failed, ret %d", ret);
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goto stop_hw;
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}
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ret = aie2_error_async_events_send(ndev);
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if (ret) {
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XDNA_ERR(xdna, "Send async events failed, ret %d", ret);
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goto async_event_free;
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}
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/* Issue a command to make sure firmware handled async events */
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ret = aie2_query_firmware_version(ndev, &ndev->xdna->fw_ver);
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if (ret) {
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XDNA_ERR(xdna, "Re-query firmware version failed");
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goto async_event_free;
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}
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release_firmware(fw);
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amdxdna_pm_init(xdna);
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return 0;
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async_event_free:
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aie2_error_async_events_free(ndev);
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stop_hw:
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aie2_hw_stop(xdna);
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release_fw:
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@@ -621,10 +600,8 @@ release_fw:
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static void aie2_fini(struct amdxdna_dev *xdna)
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{
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struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
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amdxdna_pm_fini(xdna);
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aie2_hw_stop(xdna);
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aie2_error_async_events_free(ndev);
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}
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static int aie2_get_aie_status(struct amdxdna_client *client,
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@@ -856,6 +833,10 @@ static int aie2_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i
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if (!drm_dev_enter(&xdna->ddev, &idx))
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return -ENODEV;
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ret = amdxdna_pm_resume_get(xdna);
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if (ret)
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goto dev_exit;
|
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|
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switch (args->param) {
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case DRM_AMDXDNA_QUERY_AIE_STATUS:
|
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ret = aie2_get_aie_status(client, args);
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@@ -882,8 +863,11 @@ static int aie2_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i
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XDNA_ERR(xdna, "Not supported request parameter %u", args->param);
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ret = -EOPNOTSUPP;
|
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}
|
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amdxdna_pm_suspend_put(xdna);
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XDNA_DBG(xdna, "Got param %d", args->param);
|
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|
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dev_exit:
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drm_dev_exit(idx);
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return ret;
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}
|
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@@ -932,6 +916,10 @@ static int aie2_get_array(struct amdxdna_client *client,
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if (!drm_dev_enter(&xdna->ddev, &idx))
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return -ENODEV;
|
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|
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ret = amdxdna_pm_resume_get(xdna);
|
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if (ret)
|
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goto dev_exit;
|
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|
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switch (args->param) {
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case DRM_AMDXDNA_HW_CONTEXT_ALL:
|
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ret = aie2_query_ctx_status_array(client, args);
|
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@@ -940,8 +928,11 @@ static int aie2_get_array(struct amdxdna_client *client,
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XDNA_ERR(xdna, "Not supported request parameter %u", args->param);
|
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ret = -EOPNOTSUPP;
|
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}
|
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|
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amdxdna_pm_suspend_put(xdna);
|
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XDNA_DBG(xdna, "Got param %d", args->param);
|
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|
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dev_exit:
|
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drm_dev_exit(idx);
|
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return ret;
|
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}
|
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@@ -980,6 +971,10 @@ static int aie2_set_state(struct amdxdna_client *client,
|
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if (!drm_dev_enter(&xdna->ddev, &idx))
|
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return -ENODEV;
|
||||
|
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ret = amdxdna_pm_resume_get(xdna);
|
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if (ret)
|
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goto dev_exit;
|
||||
|
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switch (args->param) {
|
||||
case DRM_AMDXDNA_SET_POWER_MODE:
|
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ret = aie2_set_power_mode(client, args);
|
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@@ -990,6 +985,8 @@ static int aie2_set_state(struct amdxdna_client *client,
|
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break;
|
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}
|
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|
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amdxdna_pm_suspend_put(xdna);
|
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dev_exit:
|
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drm_dev_exit(idx);
|
||||
return ret;
|
||||
}
|
||||
|
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@@ -272,7 +272,8 @@ int aie2_map_host_buf(struct amdxdna_dev_hdl *ndev, u32 context_id, u64 addr, u6
|
||||
int aie2_query_status(struct amdxdna_dev_hdl *ndev, char __user *buf, u32 size, u32 *cols_filled);
|
||||
int aie2_register_asyn_event_msg(struct amdxdna_dev_hdl *ndev, dma_addr_t addr, u32 size,
|
||||
void *handle, int (*cb)(void*, void __iomem *, size_t));
|
||||
int aie2_config_cu(struct amdxdna_hwctx *hwctx);
|
||||
int aie2_config_cu(struct amdxdna_hwctx *hwctx,
|
||||
int (*notify_cb)(void *, void __iomem *, size_t));
|
||||
int aie2_execbuf(struct amdxdna_hwctx *hwctx, struct amdxdna_sched_job *job,
|
||||
int (*notify_cb)(void *, void __iomem *, size_t));
|
||||
int aie2_cmdlist_single_execbuf(struct amdxdna_hwctx *hwctx,
|
||||
|
||||
@@ -11,6 +11,7 @@
|
||||
|
||||
#include "aie2_pci.h"
|
||||
#include "amdxdna_pci_drv.h"
|
||||
#include "amdxdna_pm.h"
|
||||
|
||||
#define SMU_RESULT_OK 1
|
||||
|
||||
@@ -59,12 +60,16 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level)
|
||||
u32 freq;
|
||||
int ret;
|
||||
|
||||
ret = amdxdna_pm_resume_get(ndev->xdna);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = aie2_smu_exec(ndev, AIE2_SMU_SET_MPNPUCLK_FREQ,
|
||||
ndev->priv->dpm_clk_tbl[dpm_level].npuclk, &freq);
|
||||
if (ret) {
|
||||
XDNA_ERR(ndev->xdna, "Set npu clock to %d failed, ret %d\n",
|
||||
ndev->priv->dpm_clk_tbl[dpm_level].npuclk, ret);
|
||||
return ret;
|
||||
goto suspend_put;
|
||||
}
|
||||
ndev->npuclk_freq = freq;
|
||||
|
||||
@@ -73,8 +78,10 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level)
|
||||
if (ret) {
|
||||
XDNA_ERR(ndev->xdna, "Set h clock to %d failed, ret %d\n",
|
||||
ndev->priv->dpm_clk_tbl[dpm_level].hclk, ret);
|
||||
return ret;
|
||||
goto suspend_put;
|
||||
}
|
||||
|
||||
amdxdna_pm_suspend_put(ndev->xdna);
|
||||
ndev->hclk_freq = freq;
|
||||
ndev->dpm_level = dpm_level;
|
||||
|
||||
@@ -82,26 +89,35 @@ int npu1_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level)
|
||||
ndev->npuclk_freq, ndev->hclk_freq);
|
||||
|
||||
return 0;
|
||||
|
||||
suspend_put:
|
||||
amdxdna_pm_suspend_put(ndev->xdna);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = amdxdna_pm_resume_get(ndev->xdna);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = aie2_smu_exec(ndev, AIE2_SMU_SET_HARD_DPMLEVEL, dpm_level, NULL);
|
||||
if (ret) {
|
||||
XDNA_ERR(ndev->xdna, "Set hard dpm level %d failed, ret %d ",
|
||||
dpm_level, ret);
|
||||
return ret;
|
||||
goto suspend_put;
|
||||
}
|
||||
|
||||
ret = aie2_smu_exec(ndev, AIE2_SMU_SET_SOFT_DPMLEVEL, dpm_level, NULL);
|
||||
if (ret) {
|
||||
XDNA_ERR(ndev->xdna, "Set soft dpm level %d failed, ret %d",
|
||||
dpm_level, ret);
|
||||
return ret;
|
||||
goto suspend_put;
|
||||
}
|
||||
|
||||
amdxdna_pm_suspend_put(ndev->xdna);
|
||||
ndev->npuclk_freq = ndev->priv->dpm_clk_tbl[dpm_level].npuclk;
|
||||
ndev->hclk_freq = ndev->priv->dpm_clk_tbl[dpm_level].hclk;
|
||||
ndev->dpm_level = dpm_level;
|
||||
@@ -110,6 +126,10 @@ int npu4_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level)
|
||||
ndev->npuclk_freq, ndev->hclk_freq);
|
||||
|
||||
return 0;
|
||||
|
||||
suspend_put:
|
||||
amdxdna_pm_suspend_put(ndev->xdna);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int aie2_smu_init(struct amdxdna_dev_hdl *ndev)
|
||||
|
||||
@@ -161,19 +161,14 @@ int amdxdna_drm_create_hwctx_ioctl(struct drm_device *dev, void *data, struct dr
|
||||
if (args->ext || args->ext_flags)
|
||||
return -EINVAL;
|
||||
|
||||
if (!drm_dev_enter(dev, &idx))
|
||||
return -ENODEV;
|
||||
|
||||
hwctx = kzalloc(sizeof(*hwctx), GFP_KERNEL);
|
||||
if (!hwctx) {
|
||||
ret = -ENOMEM;
|
||||
goto exit;
|
||||
}
|
||||
if (!hwctx)
|
||||
return -ENOMEM;
|
||||
|
||||
if (copy_from_user(&hwctx->qos, u64_to_user_ptr(args->qos_p), sizeof(hwctx->qos))) {
|
||||
XDNA_ERR(xdna, "Access QoS info failed");
|
||||
ret = -EFAULT;
|
||||
goto free_hwctx;
|
||||
kfree(hwctx);
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
hwctx->client = client;
|
||||
@@ -181,30 +176,36 @@ int amdxdna_drm_create_hwctx_ioctl(struct drm_device *dev, void *data, struct dr
|
||||
hwctx->num_tiles = args->num_tiles;
|
||||
hwctx->mem_size = args->mem_size;
|
||||
hwctx->max_opc = args->max_opc;
|
||||
|
||||
guard(mutex)(&xdna->dev_lock);
|
||||
|
||||
if (!drm_dev_enter(dev, &idx)) {
|
||||
ret = -ENODEV;
|
||||
goto free_hwctx;
|
||||
}
|
||||
|
||||
ret = xdna->dev_info->ops->hwctx_init(hwctx);
|
||||
if (ret) {
|
||||
XDNA_ERR(xdna, "Init hwctx failed, ret %d", ret);
|
||||
goto dev_exit;
|
||||
}
|
||||
|
||||
hwctx->name = kasprintf(GFP_KERNEL, "hwctx.%d.%d", client->pid, hwctx->fw_ctx_id);
|
||||
if (!hwctx->name) {
|
||||
ret = -ENOMEM;
|
||||
goto fini_hwctx;
|
||||
}
|
||||
|
||||
ret = xa_alloc_cyclic(&client->hwctx_xa, &hwctx->id, hwctx,
|
||||
XA_LIMIT(AMDXDNA_INVALID_CTX_HANDLE + 1, MAX_HWCTX_ID),
|
||||
&client->next_hwctxid, GFP_KERNEL);
|
||||
if (ret < 0) {
|
||||
XDNA_ERR(xdna, "Allocate hwctx ID failed, ret %d", ret);
|
||||
goto free_hwctx;
|
||||
}
|
||||
|
||||
hwctx->name = kasprintf(GFP_KERNEL, "hwctx.%d.%d", client->pid, hwctx->id);
|
||||
if (!hwctx->name) {
|
||||
ret = -ENOMEM;
|
||||
goto rm_id;
|
||||
}
|
||||
|
||||
mutex_lock(&xdna->dev_lock);
|
||||
ret = xdna->dev_info->ops->hwctx_init(hwctx);
|
||||
if (ret) {
|
||||
mutex_unlock(&xdna->dev_lock);
|
||||
XDNA_ERR(xdna, "Init hwctx failed, ret %d", ret);
|
||||
goto free_name;
|
||||
}
|
||||
|
||||
args->handle = hwctx->id;
|
||||
args->syncobj_handle = hwctx->syncobj_hdl;
|
||||
mutex_unlock(&xdna->dev_lock);
|
||||
|
||||
atomic64_set(&hwctx->job_submit_cnt, 0);
|
||||
atomic64_set(&hwctx->job_free_cnt, 0);
|
||||
@@ -214,12 +215,12 @@ int amdxdna_drm_create_hwctx_ioctl(struct drm_device *dev, void *data, struct dr
|
||||
|
||||
free_name:
|
||||
kfree(hwctx->name);
|
||||
rm_id:
|
||||
xa_erase(&client->hwctx_xa, hwctx->id);
|
||||
fini_hwctx:
|
||||
xdna->dev_info->ops->hwctx_fini(hwctx);
|
||||
dev_exit:
|
||||
drm_dev_exit(idx);
|
||||
free_hwctx:
|
||||
kfree(hwctx);
|
||||
exit:
|
||||
drm_dev_exit(idx);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -431,11 +432,6 @@ int amdxdna_cmd_submit(struct amdxdna_client *client,
|
||||
goto unlock_srcu;
|
||||
}
|
||||
|
||||
if (hwctx->status != HWCTX_STAT_READY) {
|
||||
XDNA_ERR(xdna, "HW Context is not ready");
|
||||
ret = -EINVAL;
|
||||
goto unlock_srcu;
|
||||
}
|
||||
|
||||
job->hwctx = hwctx;
|
||||
job->mm = current->mm;
|
||||
|
||||
@@ -194,7 +194,8 @@ static void mailbox_release_msg(struct mailbox_channel *mb_chann,
|
||||
{
|
||||
MB_DBG(mb_chann, "msg_id 0x%x msg opcode 0x%x",
|
||||
mb_msg->pkg.header.id, mb_msg->pkg.header.opcode);
|
||||
mb_msg->notify_cb(mb_msg->handle, NULL, 0);
|
||||
if (mb_msg->notify_cb)
|
||||
mb_msg->notify_cb(mb_msg->handle, NULL, 0);
|
||||
kfree(mb_msg);
|
||||
}
|
||||
|
||||
@@ -248,7 +249,7 @@ mailbox_get_resp(struct mailbox_channel *mb_chann, struct xdna_msg_header *heade
|
||||
{
|
||||
struct mailbox_msg *mb_msg;
|
||||
int msg_id;
|
||||
int ret;
|
||||
int ret = 0;
|
||||
|
||||
msg_id = header->id;
|
||||
if (!mailbox_validate_msgid(msg_id)) {
|
||||
@@ -265,9 +266,11 @@ mailbox_get_resp(struct mailbox_channel *mb_chann, struct xdna_msg_header *heade
|
||||
|
||||
MB_DBG(mb_chann, "opcode 0x%x size %d id 0x%x",
|
||||
header->opcode, header->total_size, header->id);
|
||||
ret = mb_msg->notify_cb(mb_msg->handle, data, header->total_size);
|
||||
if (unlikely(ret))
|
||||
MB_ERR(mb_chann, "Message callback ret %d", ret);
|
||||
if (mb_msg->notify_cb) {
|
||||
ret = mb_msg->notify_cb(mb_msg->handle, data, header->total_size);
|
||||
if (unlikely(ret))
|
||||
MB_ERR(mb_chann, "Message callback ret %d", ret);
|
||||
}
|
||||
|
||||
kfree(mb_msg);
|
||||
return ret;
|
||||
|
||||
@@ -13,13 +13,11 @@
|
||||
#include <drm/gpu_scheduler.h>
|
||||
#include <linux/iommu.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
#include "amdxdna_ctx.h"
|
||||
#include "amdxdna_gem.h"
|
||||
#include "amdxdna_pci_drv.h"
|
||||
|
||||
#define AMDXDNA_AUTOSUSPEND_DELAY 5000 /* milliseconds */
|
||||
#include "amdxdna_pm.h"
|
||||
|
||||
MODULE_FIRMWARE("amdnpu/1502_00/npu.sbin");
|
||||
MODULE_FIRMWARE("amdnpu/17f0_10/npu.sbin");
|
||||
@@ -61,17 +59,9 @@ static int amdxdna_drm_open(struct drm_device *ddev, struct drm_file *filp)
|
||||
struct amdxdna_client *client;
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_resume_and_get(ddev->dev);
|
||||
if (ret) {
|
||||
XDNA_ERR(xdna, "Failed to get rpm, ret %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
client = kzalloc(sizeof(*client), GFP_KERNEL);
|
||||
if (!client) {
|
||||
ret = -ENOMEM;
|
||||
goto put_rpm;
|
||||
}
|
||||
if (!client)
|
||||
return -ENOMEM;
|
||||
|
||||
client->pid = pid_nr(rcu_access_pointer(filp->pid));
|
||||
client->xdna = xdna;
|
||||
@@ -106,9 +96,6 @@ unbind_sva:
|
||||
iommu_sva_unbind_device(client->sva);
|
||||
failed:
|
||||
kfree(client);
|
||||
put_rpm:
|
||||
pm_runtime_mark_last_busy(ddev->dev);
|
||||
pm_runtime_put_autosuspend(ddev->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -130,8 +117,6 @@ static void amdxdna_drm_close(struct drm_device *ddev, struct drm_file *filp)
|
||||
|
||||
XDNA_DBG(xdna, "pid %d closed", client->pid);
|
||||
kfree(client);
|
||||
pm_runtime_mark_last_busy(ddev->dev);
|
||||
pm_runtime_put_autosuspend(ddev->dev);
|
||||
}
|
||||
|
||||
static int amdxdna_flush(struct file *f, fl_owner_t id)
|
||||
@@ -310,19 +295,12 @@ static int amdxdna_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
||||
goto failed_dev_fini;
|
||||
}
|
||||
|
||||
pm_runtime_set_autosuspend_delay(dev, AMDXDNA_AUTOSUSPEND_DELAY);
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
pm_runtime_allow(dev);
|
||||
|
||||
ret = drm_dev_register(&xdna->ddev, 0);
|
||||
if (ret) {
|
||||
XDNA_ERR(xdna, "DRM register failed, ret %d", ret);
|
||||
pm_runtime_forbid(dev);
|
||||
goto failed_sysfs_fini;
|
||||
}
|
||||
|
||||
pm_runtime_mark_last_busy(dev);
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
return 0;
|
||||
|
||||
failed_sysfs_fini:
|
||||
@@ -339,14 +317,10 @@ destroy_notifier_wq:
|
||||
static void amdxdna_remove(struct pci_dev *pdev)
|
||||
{
|
||||
struct amdxdna_dev *xdna = pci_get_drvdata(pdev);
|
||||
struct device *dev = &pdev->dev;
|
||||
struct amdxdna_client *client;
|
||||
|
||||
destroy_workqueue(xdna->notifier_wq);
|
||||
|
||||
pm_runtime_get_noresume(dev);
|
||||
pm_runtime_forbid(dev);
|
||||
|
||||
drm_dev_unplug(&xdna->ddev);
|
||||
amdxdna_sysfs_fini(xdna);
|
||||
|
||||
@@ -365,29 +339,9 @@ static void amdxdna_remove(struct pci_dev *pdev)
|
||||
mutex_unlock(&xdna->dev_lock);
|
||||
}
|
||||
|
||||
static int amdxdna_pmops_suspend(struct device *dev)
|
||||
{
|
||||
struct amdxdna_dev *xdna = pci_get_drvdata(to_pci_dev(dev));
|
||||
|
||||
if (!xdna->dev_info->ops->suspend)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return xdna->dev_info->ops->suspend(xdna);
|
||||
}
|
||||
|
||||
static int amdxdna_pmops_resume(struct device *dev)
|
||||
{
|
||||
struct amdxdna_dev *xdna = pci_get_drvdata(to_pci_dev(dev));
|
||||
|
||||
if (!xdna->dev_info->ops->resume)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return xdna->dev_info->ops->resume(xdna);
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops amdxdna_pm_ops = {
|
||||
SYSTEM_SLEEP_PM_OPS(amdxdna_pmops_suspend, amdxdna_pmops_resume)
|
||||
RUNTIME_PM_OPS(amdxdna_pmops_suspend, amdxdna_pmops_resume, NULL)
|
||||
SYSTEM_SLEEP_PM_OPS(amdxdna_pm_suspend, amdxdna_pm_resume)
|
||||
RUNTIME_PM_OPS(amdxdna_pm_suspend, amdxdna_pm_resume, NULL)
|
||||
};
|
||||
|
||||
static struct pci_driver amdxdna_pci_driver = {
|
||||
|
||||
@@ -6,6 +6,7 @@
|
||||
#ifndef _AMDXDNA_PCI_DRV_H_
|
||||
#define _AMDXDNA_PCI_DRV_H_
|
||||
|
||||
#include <drm/drm_print.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <linux/xarray.h>
|
||||
|
||||
@@ -99,6 +100,7 @@ struct amdxdna_dev {
|
||||
struct amdxdna_fw_ver fw_ver;
|
||||
struct rw_semaphore notifier_lock; /* for mmu notifier*/
|
||||
struct workqueue_struct *notifier_wq;
|
||||
bool rpm_on;
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
94
drivers/accel/amdxdna/amdxdna_pm.c
Normal file
94
drivers/accel/amdxdna/amdxdna_pm.c
Normal file
@@ -0,0 +1,94 @@
|
||||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2025, Advanced Micro Devices, Inc.
|
||||
*/
|
||||
|
||||
#include <drm/amdxdna_accel.h>
|
||||
#include <drm/drm_drv.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
#include "amdxdna_pm.h"
|
||||
|
||||
#define AMDXDNA_AUTOSUSPEND_DELAY 5000 /* milliseconds */
|
||||
|
||||
int amdxdna_pm_suspend(struct device *dev)
|
||||
{
|
||||
struct amdxdna_dev *xdna = to_xdna_dev(dev_get_drvdata(dev));
|
||||
int ret = -EOPNOTSUPP;
|
||||
bool rpm;
|
||||
|
||||
if (xdna->dev_info->ops->suspend) {
|
||||
rpm = xdna->rpm_on;
|
||||
xdna->rpm_on = false;
|
||||
ret = xdna->dev_info->ops->suspend(xdna);
|
||||
xdna->rpm_on = rpm;
|
||||
}
|
||||
|
||||
XDNA_DBG(xdna, "Suspend done ret %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int amdxdna_pm_resume(struct device *dev)
|
||||
{
|
||||
struct amdxdna_dev *xdna = to_xdna_dev(dev_get_drvdata(dev));
|
||||
int ret = -EOPNOTSUPP;
|
||||
bool rpm;
|
||||
|
||||
if (xdna->dev_info->ops->resume) {
|
||||
rpm = xdna->rpm_on;
|
||||
xdna->rpm_on = false;
|
||||
ret = xdna->dev_info->ops->resume(xdna);
|
||||
xdna->rpm_on = rpm;
|
||||
}
|
||||
|
||||
XDNA_DBG(xdna, "Resume done ret %d", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int amdxdna_pm_resume_get(struct amdxdna_dev *xdna)
|
||||
{
|
||||
struct device *dev = xdna->ddev.dev;
|
||||
int ret;
|
||||
|
||||
if (!xdna->rpm_on)
|
||||
return 0;
|
||||
|
||||
ret = pm_runtime_resume_and_get(dev);
|
||||
if (ret) {
|
||||
XDNA_ERR(xdna, "Resume failed: %d", ret);
|
||||
pm_runtime_set_suspended(dev);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
void amdxdna_pm_suspend_put(struct amdxdna_dev *xdna)
|
||||
{
|
||||
struct device *dev = xdna->ddev.dev;
|
||||
|
||||
if (!xdna->rpm_on)
|
||||
return;
|
||||
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
}
|
||||
|
||||
void amdxdna_pm_init(struct amdxdna_dev *xdna)
|
||||
{
|
||||
struct device *dev = xdna->ddev.dev;
|
||||
|
||||
pm_runtime_set_active(dev);
|
||||
pm_runtime_set_autosuspend_delay(dev, AMDXDNA_AUTOSUSPEND_DELAY);
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
pm_runtime_allow(dev);
|
||||
pm_runtime_put_autosuspend(dev);
|
||||
xdna->rpm_on = true;
|
||||
}
|
||||
|
||||
void amdxdna_pm_fini(struct amdxdna_dev *xdna)
|
||||
{
|
||||
struct device *dev = xdna->ddev.dev;
|
||||
|
||||
xdna->rpm_on = false;
|
||||
pm_runtime_get_noresume(dev);
|
||||
pm_runtime_forbid(dev);
|
||||
}
|
||||
18
drivers/accel/amdxdna/amdxdna_pm.h
Normal file
18
drivers/accel/amdxdna/amdxdna_pm.h
Normal file
@@ -0,0 +1,18 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2025, Advanced Micro Devices, Inc.
|
||||
*/
|
||||
|
||||
#ifndef _AMDXDNA_PM_H_
|
||||
#define _AMDXDNA_PM_H_
|
||||
|
||||
#include "amdxdna_pci_drv.h"
|
||||
|
||||
int amdxdna_pm_suspend(struct device *dev);
|
||||
int amdxdna_pm_resume(struct device *dev);
|
||||
int amdxdna_pm_resume_get(struct amdxdna_dev *xdna);
|
||||
void amdxdna_pm_suspend_put(struct amdxdna_dev *xdna);
|
||||
void amdxdna_pm_init(struct amdxdna_dev *xdna);
|
||||
void amdxdna_pm_fini(struct amdxdna_dev *xdna);
|
||||
|
||||
#endif /* _AMDXDNA_PM_H_ */
|
||||
Reference in New Issue
Block a user